Hi, Shawn

Best Regards!
Anson Huang

> -----Original Message-----
> From: Anson Huang
> Sent: Monday, April 22, 2019 8:52 AM
> To: Shawn Guo <shawn...@kernel.org>
> Cc: stefan.wah...@i2se.com; enric.balle...@collabora.com; linux-
> ker...@vger.kernel.org; he...@sntech.de; marc.w.gonza...@free.fr;
> ezequ...@collabora.com; catalin.mari...@arm.com;
> s.ha...@pengutronix.de; will.dea...@arm.com; Abel Vesa
> <abel.v...@nxp.com>; bjorn.anders...@linaro.org; Andy Gross
> <andy.gr...@linaro.org>; ja...@amarulasolutions.com;
> ker...@pengutronix.de; dl-linux-imx <linux-...@nxp.com>; o...@lixom.net;
> horms+rene...@verge.net.au; feste...@gmail.com; r...@kernel.org;
> linux-arm-ker...@lists.infradead.org; l.st...@pengutronix.de
> Subject: RE: [PATCH 1/2] soc: imx-sc: add i.MX system controller soc driver
> support
> 
> Hi, Shawn
> 
> Best Regards!
> Anson Huang
> 
> > -----Original Message-----
> > From: Shawn Guo [mailto:shawn...@kernel.org]
> > Sent: Sunday, April 21, 2019 3:42 PM
> > To: Anson Huang <anson.hu...@nxp.com>
> > Cc: stefan.wah...@i2se.com; enric.balle...@collabora.com; linux-
> > ker...@vger.kernel.org; he...@sntech.de; marc.w.gonza...@free.fr;
> > ezequ...@collabora.com; catalin.mari...@arm.com;
> > s.ha...@pengutronix.de; will.dea...@arm.com; Abel Vesa
> > <abel.v...@nxp.com>; bjorn.anders...@linaro.org; Andy Gross
> > <andy.gr...@linaro.org>; ja...@amarulasolutions.com;
> > ker...@pengutronix.de; dl-linux-imx <linux-...@nxp.com>;
> > o...@lixom.net;
> > horms+rene...@verge.net.au; feste...@gmail.com; r...@kernel.org;
> > linux-arm-ker...@lists.infradead.org; l.st...@pengutronix.de
> > Subject: Re: [PATCH 1/2] soc: imx-sc: add i.MX system controller soc
> > driver support
> >
> > On Sun, Apr 21, 2019 at 03:40:00PM +0800, Shawn Guo wrote:
> > > On Thu, Apr 11, 2019 at 06:49:12AM +0000, Anson Huang wrote:
> > > > i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller
> > > > inside, the system controller is in charge of controlling power,
> > > > clock and fuse etc..
> > > >
> > > > This patch adds i.MX system controller soc driver support, Linux
> > > > kernel has to communicate with system controller via MU (message
> > > > unit) IPC to get soc revision, uid etc..
> > > >
> > > > With this patch, soc info can be read from sysfs:
> > > >
> > > > i.mx8qxp-mek# cat /sys/devices/soc0/family Freescale i.MX
> > > >
> > > > i.mx8qxp-mek# cat /sys/devices/soc0/soc_id i.MX8QXP
> > > >
> > > > i.mx8qxp-mek# cat /sys/devices/soc0/machine Freescale i.MX8QXP
> MEK
> > > >
> > > > i.mx8qxp-mek# cat /sys/devices/soc0/revision
> > > > 1.1
> > > >
> > > > i.mx8qxp-mek# cat /sys/devices/soc0/soc_uid
> > > > 7B64280B57AC1898
> > > >
> > > > Signed-off-by: Anson Huang <anson.hu...@nxp.com>
> > > > ---
> > > >  drivers/soc/imx/Kconfig      |   7 ++
> > > >  drivers/soc/imx/Makefile     |   1 +
> > > >  drivers/soc/imx/soc-imx-sc.c | 220
> > > > +++++++++++++++++++++++++++++++++++++++++++
> > > >  3 files changed, 228 insertions(+)  create mode 100644
> > > > drivers/soc/imx/soc-imx-sc.c
> > >
> > > Rather than creating a new driver, please take a look at Abel's
> > > generic
> > > i.MX8 SoC driver, and see if it can be extended to cover i.MX8QXP.
> >
> > Forgot to give pointer to Abel's driver.
> >
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit.
> > ker
> nel.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Fshawnguo%2Flinux.git%
> >
> 2Fcommit%2F%3Fh%3Dimx%2Fdrivers%26id%3Da7e26f356ca12906a164d83c
> >
> 9e9f8527ee7da022&amp;data=02%7C01%7Canson.huang%40nxp.com%7C9
> >
> e2705d7449b4c2e23ed08d6c62ce0bb%7C686ea1d3bc2b4c6fa92cd99c5c3016
> >
> 35%7C0%7C0%7C636914293400307709&amp;sdata=6ySEs%2B4SE8bvcBCkfoi
> > VBafseAYthTED9%2F5qcf25xds%3D&amp;reserved=0
> >
> 
> Got it, I didn't notice that this patch bas been accepted, I will redo the 
> patch
> based on it, thanks.

I have sent the new patch set to support i.MX8QXP SoC revision based on generic 
i.MX8
SoC driver, however, the Kconfig modification is NOT good, it may break i.MX8MQ 
if IMX_SCU
is NOT enabled, although we can add some warp function for SCU firmware API 
call to fix it,
but after further thought and discussion with Dong Aisheng, I think we may need 
to roll back to
use this patch series to create a new SoC driver dedicated for i.MX8 SoCs
with system controller inside, such as i.MX8QXP, i.MX8QM etc., the reason are 
as below:

For i.MX8MQ/i.MX8MM:
        1. SoC driver does NOT depends on i.MX SCU firmware, so no need to use 
platform driver
             probe model, just device_init phase call is good enough;
        2. The SoC driver no need to depends on IMX_SCU, so it can be always 
built in, no need to
             check IMX_SCU config;
        3. The fuse check for CPU speed grading, HDCP status, NoC settings etc. 
could be added to this driver,
            but they are ONLY for i.MX8MQ/i.MX8MM etc..
For i.MX8QXP/i.MX8QM:
        1. SoC driver MUST depends on IMX_SCU;
        2. MUST use platform model to support defer probe;
        3. No fuse check for CPU speed grading.

So, I guess the reused code for i.MX8MQ and i.MX8QXP is ONLY those part of 
creating SoC id device node (less than
30% I think), all other functions are implemented in total different ways, that 
is why I created the imx_sc_soc driver
in this patch series, so do you think we can add new SoC driver for i.MX8 SoC 
with SCU inside? Putting 2 different architecture
SoCs' driver into 1 file looks like NOT making enough sense.

Anson.

> 
> Anson.
> 
> > Shawn

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