On Tue, 26 Dec 2000, Joe deBlaquiere wrote:
> > Read the ISA manual; sc will fail if the LL-bit in c0_status is cleared
> > which will be cleared when the interrupt returns using the eret instruction.
>
> I tried to find a MIPSIII manual from mips.com but all I could find was
> mips32 and mips64 (which are not the same as MIPSII/MIPSIII/MIPSIV).
Get "IDT MIPS Microprocessor Software Reference Manual" from
http://decstation.unix-ag.org/docs/ic_docs/3715.pdf (the original is no
longer available from IDT servers).
--
+ Maciej W. Rozycki, Technical University of Gdansk, Poland +
+--------------------------------------------------------------+
+ e-mail: [EMAIL PROTECTED], PGP key available +
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