This patch adds SCAUSE interrupt flag and SCAUSE interrupt related
defines to asm/csr.h. We also use these defines in kernel/irq.c and
express SIE/SIP flags in-terms of SCAUSE interrupt causes.

Signed-off-by: Anup Patel <[email protected]>
---
 arch/riscv/include/asm/csr.h | 25 +++++++++++++++++++++----
 arch/riscv/kernel/irq.c      | 23 ++++-------------------
 2 files changed, 25 insertions(+), 23 deletions(-)

diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
index 2ae54a7386f1..ab40a936cb2d 100644
--- a/arch/riscv/include/asm/csr.h
+++ b/arch/riscv/include/asm/csr.h
@@ -51,10 +51,22 @@
 #define SATP_MODE      SATP_MODE_39
 #endif
 
-/* Interrupt Enable and Interrupt Pending flags */
-#define SIE_SSIE       _AC(0x00000002, UL) /* Software Interrupt Enable */
-#define SIE_STIE       _AC(0x00000020, UL) /* Timer Interrupt Enable */
-#define SIE_SEIE       _AC(0x00000200, UL) /* External Interrupt Enable */
+/* SCAUSE */
+#ifdef CONFIG_64BIT
+#define SCAUSE_IRQ_FLAG                _AC(0x8000000000000000, UL)
+#else
+#define SCAUSE_IRQ_FLAG                _AC(0x80000000, UL)
+#endif
+
+#define IRQ_U_SOFT             0
+#define IRQ_S_SOFT             1
+#define IRQ_M_SOFT             3
+#define IRQ_U_TIMER            4
+#define IRQ_S_TIMER            5
+#define IRQ_M_TIMER            7
+#define IRQ_U_EXT              8
+#define IRQ_S_EXT              9
+#define IRQ_M_EXT              11
 
 #define EXC_INST_MISALIGNED    0
 #define EXC_INST_ACCESS                1
@@ -66,6 +78,11 @@
 #define EXC_LOAD_PAGE_FAULT    13
 #define EXC_STORE_PAGE_FAULT   15
 
+/* SIE (Interrupt Enable) and SIP (Interrupt Pending) flags */
+#define SIE_SSIE               (_AC(0x1, UL) << IRQ_S_SOFT)
+#define SIE_STIE               (_AC(0x1, UL) << IRQ_S_TIMER)
+#define SIE_SEIE               (_AC(0x1, UL) << IRQ_S_EXT)
+
 #ifndef __ASSEMBLY__
 
 #define csr_swap(csr, val)                                     \
diff --git a/arch/riscv/kernel/irq.c b/arch/riscv/kernel/irq.c
index 48e6b7db83a1..68e5025b5a58 100644
--- a/arch/riscv/kernel/irq.c
+++ b/arch/riscv/kernel/irq.c
@@ -11,21 +11,6 @@
 #include <linux/seq_file.h>
 #include <asm/smp.h>
 
-/*
- * Possible interrupt causes:
- */
-#define INTERRUPT_CAUSE_SOFTWARE    1
-#define INTERRUPT_CAUSE_TIMER       5
-#define INTERRUPT_CAUSE_EXTERNAL    9
-
-/*
- * The high order bit of the trap cause register is always set for
- * interrupts, which allows us to differentiate them from exceptions
- * quickly.  The INTERRUPT_CAUSE_* macros don't contain that bit, so we
- * need to mask it off.
- */
-#define INTERRUPT_CAUSE_FLAG   (1UL << (__riscv_xlen - 1))
-
 int arch_show_interrupts(struct seq_file *p, int prec)
 {
        show_ipi_stats(p, prec);
@@ -37,12 +22,12 @@ asmlinkage void __irq_entry do_IRQ(struct pt_regs *regs)
        struct pt_regs *old_regs = set_irq_regs(regs);
 
        irq_enter();
-       switch (regs->scause & ~INTERRUPT_CAUSE_FLAG) {
-       case INTERRUPT_CAUSE_TIMER:
+       switch (regs->scause & ~SCAUSE_IRQ_FLAG) {
+       case IRQ_S_TIMER:
                riscv_timer_interrupt();
                break;
 #ifdef CONFIG_SMP
-       case INTERRUPT_CAUSE_SOFTWARE:
+       case IRQ_S_SOFT:
                /*
                 * We only use software interrupts to pass IPIs, so if a non-SMP
                 * system gets one, then we don't know what to do.
@@ -50,7 +35,7 @@ asmlinkage void __irq_entry do_IRQ(struct pt_regs *regs)
                riscv_software_interrupt();
                break;
 #endif
-       case INTERRUPT_CAUSE_EXTERNAL:
+       case IRQ_S_EXT:
                handle_arch_irq(regs);
                break;
        default:
-- 
2.17.1

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