On Tue, Apr 09, 2019 at 08:01:32AM -0700, Paul E. McKenney wrote:
> On Tue, Apr 09, 2019 at 03:36:18AM +0200, Andrea Parri wrote:
> > > > The formula was more along the line of "do not assume either of these
> > > > cases to hold; use barrier() is you need an unconditional barrier..."
> > > > AFAICT, all current implementations of smp_mb__{before,after}_atomic()
> > > > provides a compiler barrier with either barrier() or "memory" clobber.
> > >
> > > Well, we have two reasonable choices: Say that
> > > smp_mb__{before,after}_atomic will always provide a compiler barrier,
> > > or don't say this. I see no point in saying that the combination of
> > > Before-atomic followed by RMW provides a barrier.
> >
> > ;-/ I'm fine with the first choice. I don't see how the second choice
> > (this proposal/patch) would be consistent with some documentation and
> > with the current implementations; for example,
> >
> > 1) Documentation/atomic_t.txt says:
> >
> > Thus:
> >
> > atomic_fetch_add();
> >
> > is equivalent to:
> >
> > smp_mb__before_atomic();
> > atomic_fetch_add_relaxed();
> > smp_mb__after_atomic();
> >
> > [...]
> >
> > 2) Some implementations of the _relaxed() variants do not provide any
> > compiler barrier currently.
>
> But don't all implementations of smp_mb__before_atomic() and
> smp_mb__after_atomic() currently supply a compiler barrier?
Yes, AFAICS, all implementations of smp_mb__{before,after}_atomic() currently
supply a compiler barrier.
Nevertheless, there's a difference between: (1) Specify that these barriers
supply a compiler barrier, (2) Specify that (certain) combinations of these
barriers and RMWs supply a compiler barrier, and (3) This patch... ;-)
FWIW, I'm not aware of current/informal documentation following (the arguably
simpler but slightly stronger) (1). But again (amending my last remark): (1)
and (2) both make sense to me.
Thanx,
Andrea
>
> Thanx, Paul
>
