> On Thu, Apr 04, 2019 at 05:14:10PM -0700, Sowjanya Komatineni wrote: > > Some SPI Master controllers support configuring Least significant byte > > first or Most significant byte first order for transfers. Also some > > SPI slave devices expect bytes to be in Least significant first order > > and some devices expect Most significant first order. > > > > SPI driver declares mode and mode_bits as u16 and all bits are used. > > > > This patch changes mode and mode_bits to be u32 to allow for more mode > > configurations. > > > > This patch also creates SPI_LSBYTE_FIRST mode to allow SPI clients to > > choose LSByte order or MSByte order through the device tree property > > spi-lsbyte-first. > > Please submit one patch per change, each with a clear changelog, as covered > in SubmittingPatches. This makes it much easier to review things since it's > easier to tell if the patch does what it was intended to do and means that if > one part of the patch casues problems it won't hold up the other parts.
Hi Mark, I split changes on SPI code side and SPI Tegra side as separate patches. Do you meant to have both changes on SPI core and SPI Tegra together in a single patch? Thanks Sowjanya
