> Ok I have a vague idea on how this could but its likely that the > changes make things worse rather than better. Additional reference to a > new cacheline (per cpu but still), preempt disable. Lots of code at all > call sites. Interrupt enable/disable is quite efficient in recent > processors.
The goal of this was not to be faster than interrupt disable, but to avoid the interrupt latency impact. This might be a problem when spending a lot of time inside the locks. -Andi - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
