This patchset adds support for the clock tree feeding the 4xCortex A53 cpu cluster.
This patchet does not handle clock changing, this will be added in a secondary patchset. The CPU clock can either use the SYS_PLL for > 1GHz frequencies or use a couple of div+mux from 1GHz/667MHz/24MHz source with 2 non-glitch muxes. The CPU clock must be switched to a safe clock while changing the clocks before the non-glitch muxes. Proper support will be added later. In this patchset, clocks are set read-only. Changes since v1: - moved to clk_regmap_gate_ro_ops for R/O gates - added comments with datasheet field names - moved pribate bindings changes to driver patch - removed invalid PCIE IDs Neil Armstrong (2): clk: meson-g12a: add cpu clock bindings clk: meson: g12a: add cpu clocks drivers/clk/meson/g12a.c | 350 ++++++++++++++++++++++++++ drivers/clk/meson/g12a.h | 22 +- include/dt-bindings/clock/g12a-clkc.h | 1 + 3 files changed, 372 insertions(+), 1 deletion(-) -- 2.20.1