[Apologize for the double-post, messed up with my mailer... ] 2007/8/8, Andi Kleen <[EMAIL PROTECTED]>: > > I don't see why we have to worry about cache corruption in the case at > > hand. Write-combining is needed to map io (typically pci-mem regions) > > which are never mapped cachable anywhere, including in the linear map. > > If we WC them using PAT then there would be a UC<->WC conflict with > the direct mapping and possibly others. That's already undefined > and not allowed. > > After some very bad experiences in the past I'm not going to take > chances on this. > > We really need to keep all possible mappings synchronized. > > -Andi > >
Hi, First thanks for your reactions. Andi, what i don't understand is, if we only put a minimal patch, like only modifying the register, perhaps we may avoid having all vendors doing their own recipe, possibly all messing the one the other. As you said , changing this register is absolutely not the actual issue with PAT, but don't you think such a first step is needed to avoid conflicts since people _do_ already set that register from their driver. I agree there is work for a comprehensive support of PAT, especially when dealing with ioremap, but even though we only handle a smallish portion of the problem yet, perhaps it's time to at least modify that register ? Of course there is no problem for that being dependant on a CONFIG_PAT. Kind regards, Cédric - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
