On 1/31/19 7:38 AM, Bartosz Golaszewski wrote:
From: Bartosz Golaszewski <[email protected]>
In order to support SPARSE_IRQ we first need to make davinci use the
generic irq handler for ARM. Translate the legacy assembly to C and
put the irq handlers into their respective drivers (aintc and cp-intc).
Signed-off-by: Bartosz Golaszewski <[email protected]>
---
...
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
...
@@ -97,6 +98,16 @@ static struct irq_chip cp_intc_irq_chip = {
static struct irq_domain *cp_intc_domain;
+static asmlinkage void __exception_irq_entry
+cp_intc_handle_irq(struct pt_regs *regs)
+{
+ int irqnr = cp_intc_read(CP_INTC_PRIO_IDX);
+
+ irqnr &= 0xff;
What does applying the 0xff mask do? (perhaps needs a code
comment if it is important and not obvious).
+
+ handle_domain_irq(cp_intc_domain, irqnr, regs);
+}
+
static int cp_intc_host_map(struct irq_domain *h, unsigned int virq,
irq_hw_number_t hw)
{
...
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
...
@@ -69,6 +76,19 @@ davinci_alloc_gc(void __iomem *base, unsigned int irq_start,
unsigned int num)
IRQ_NOREQUEST | IRQ_NOPROBE, 0);
}
+static asmlinkage void __exception_irq_entry
+davinci_handle_irq(struct pt_regs *regs)
+{
+ int irqnr = davinci_irq_readl(IRQ_IRQENTRY_OFFSET);
+ struct pt_regs *old_regs = set_irq_regs(regs);
+
+ irqnr >>= 2;
+ irqnr -= 1;
Same here. It is not obvious to me what sort of conversion
is going on here.
+
+ generic_handle_irq(irqnr);
+ set_irq_regs(old_regs);
+}
+
/* ARM Interrupt Controller Initialization */
void __init davinci_irq_init(void)
{
