From: Tudor Ambarus <tudor.amba...@microchip.com>

Cache Serial Memory Mode (SMM) value to avoid write access when
setting the controller in serial memory mode. SMM is set in
exec_op() and not at probe time, to let room for future regular
SPI support.

Signed-off-by: Tudor Ambarus <tudor.amba...@microchip.com>
---
v3: update smm value when different. rename mr/smm
v2: cache MR value instead of moving the write access at probe

 drivers/spi/atmel-quadspi.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/atmel-quadspi.c b/drivers/spi/atmel-quadspi.c
index ddc712410812..645284c6ec9a 100644
--- a/drivers/spi/atmel-quadspi.c
+++ b/drivers/spi/atmel-quadspi.c
@@ -155,6 +155,7 @@ struct atmel_qspi {
        struct clk              *clk;
        struct platform_device  *pdev;
        u32                     pending;
+       u32                     smm;
        struct completion       cmd_completion;
 };
 
@@ -238,7 +239,11 @@ static int atmel_qspi_exec_op(struct spi_mem *mem, const 
struct spi_mem_op *op)
        icr = QSPI_ICR_INST(op->cmd.opcode);
        ifr = QSPI_IFR_INSTEN;
 
-       qspi_writel(aq, QSPI_MR, QSPI_MR_SMM);
+       /* Set the QSPI controller in Serial Memory Mode */
+       if (aq->smm != QSPI_MR_SMM) {
+               qspi_writel(aq, QSPI_MR, QSPI_MR_SMM);
+               aq->smm = QSPI_MR_SMM;
+       }
 
        mode = find_mode(op);
        if (mode < 0)
-- 
2.9.5

Reply via email to