[PATCH v2 5/9] arm64: dts: msm8996: Add UFS PHY reset controller

[Evan Green]

Add the reset controller for the UFS controller, and wire it up
so that the UFS PHY can initialize itself without relying on
implicit sequencing between the two drivers.

Signed-off-by: Evan Green <evgr...@chromium.org>
Reviewed-by: Stephen Boyd <swb...@chromium.org>
---

Changes in v2: None

 arch/arm64/boot/dts/qcom/msm8996.dtsi | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi 
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 99b7495455a62..179f1988d45c5 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -663,10 +663,11 @@
                        clock-names = "ref_clk_src", "ref_clk";
                        clocks = <&rpmcc RPM_SMD_LN_BB_CLK>,
                                 <&gcc GCC_UFS_CLKREF_CLK>;
+                       resets = <&ufshc 0>;
                        status = "disabled";
                };
 
-               ufshc@624000 {
+               ufshc: ufshc@624000 {
                        compatible = "qcom,ufshc";
                        reg = <0x624000 0x2500>;
                        interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
@@ -722,6 +723,7 @@
                                <0 0>;
 
                        lanes-per-direction = <1>;
+                       #reset-cells = <1>;
                        status = "disabled";
 
                        ufs_variant {
-- 
2.18.1