From: Li Yu <liy...@hisilicon.com>

dma_avail_chan as a property for k3dma, it defines available dma
channels which a non-secure mode driver can use.

One sample usage of this is in Hi3660 SoC. DMA channel 0 is
reserved to lpm3, which is a coprocessor for power management. So
as a result, any request in kernel (which runs on main processor
and in non-secure mode) should start from at least channel 1.

Cc: Dan Williams <dan.j.willi...@intel.com>
Cc: Vinod Koul <vk...@kernel.org>
Cc: Tanglei Han <hantang...@huawei.com>
Cc: Zhuangluan Su <suzhuangl...@hisilicon.com>
Cc: Ryan Grachek <r...@edited.us>
Cc: Manivannan Sadhasivam <manivannan.sadhasi...@linaro.org>
Cc: Guodong Xu <guodong...@linaro.org>
Cc: dmaeng...@vger.kernel.org
Signed-off-by: Li Yu <liy...@hisilicon.com>
[jstultz: Reworked to use a channel mask]
Signed-off-by: John Stultz <john.stu...@linaro.org>
---
 drivers/dma/k3dma.c | 20 +++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c
index b2060bf..431094b 100644
--- a/drivers/dma/k3dma.c
+++ b/drivers/dma/k3dma.c
@@ -111,6 +111,7 @@ struct k3_dma_dev {
        struct dma_pool         *pool;
        u32                     dma_channels;
        u32                     dma_requests;
+       u32                     dma_avail_chan;
        unsigned int            irq;
 };
 
@@ -318,6 +319,9 @@ static void k3_dma_tasklet(unsigned long arg)
        /* check new channel request in d->chan_pending */
        spin_lock_irq(&d->lock);
        for (pch = 0; pch < d->dma_channels; pch++) {
+               if (!(d->dma_avail_chan & (1<<pch)))
+                       continue;
+
                p = &d->phy[pch];
 
                if (p->vchan == NULL && !list_empty(&d->chan_pending)) {
@@ -335,6 +339,9 @@ static void k3_dma_tasklet(unsigned long arg)
        spin_unlock_irq(&d->lock);
 
        for (pch = 0; pch < d->dma_channels; pch++) {
+               if (!(d->dma_avail_chan & (1<<pch)))
+                       continue;
+
                if (pch_alloc & (1 << pch)) {
                        p = &d->phy[pch];
                        c = p->vchan;
@@ -855,6 +862,13 @@ static int k3_dma_probe(struct platform_device *op)
                                "dma-channels", &d->dma_channels);
                of_property_read_u32((&op->dev)->of_node,
                                "dma-requests", &d->dma_requests);
+               ret = of_property_read_u32((&op->dev)->of_node,
+                               "dma-avail-chan", &d->dma_avail_chan);
+               if (ret) {
+                       dev_warn(&op->dev,
+                                "dma-avail-chan doesn't exist, considering all 
as available.\n");
+                       d->dma_avail_chan = (u32)~0UL;
+               }
        }
 
        if (!(soc_data->flags & K3_FLAG_NOCLK)) {
@@ -886,8 +900,12 @@ static int k3_dma_probe(struct platform_device *op)
                return -ENOMEM;
 
        for (i = 0; i < d->dma_channels; i++) {
-               struct k3_dma_phy *p = &d->phy[i];
+               struct k3_dma_phy *p;
+
+               if (!(d->dma_avail_chan & (1<<i)))
+                       continue;
 
+               p = &d->phy[i];
                p->idx = i;
                p->base = d->base + i * 0x40;
        }
-- 
2.7.4

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