[PATCH 3/6] ARM: dts: Add CMU support for Actions Semi Owl S500 SoC

[Manivannan Sadhasivam]

Add Clock Management Unit (CMU) support for Actions Semi Owl family
S500 SoC.

Signed-off-by: Edgar Bernardi Righi <edgar.ri...@lsitec.org.br>
[Mani: Fixed commit message and DTS]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasi...@linaro.org>
---
 arch/arm/boot/dts/owl-s500.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm/boot/dts/owl-s500.dtsi b/arch/arm/boot/dts/owl-s500.dtsi
index 5ceb6cc4451d..aa758538de8c 100644
--- a/arch/arm/boot/dts/owl-s500.dtsi
+++ b/arch/arm/boot/dts/owl-s500.dtsi
@@ -3,8 +3,10 @@
  * Actions Semi S500 SoC
  *
  * Copyright (c) 2016-2017 Andreas Färber
+ * Copyright (c) 2018 Edgar Bernardi Righi
  */
 
+#include <dt-bindings/clock/actions,s500-cmu.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/power/owl-s500-powergate.h>
 
@@ -70,6 +72,12 @@
                #clock-cells = <0>;
        };
 
+       losc: losc {
+               compatible = "fixed-clock";
+               clock-frequency = <32768>;
+               #clock-cells = <0>;
+       };
+
        soc {
                compatible = "simple-bus";
                #address-cells = <1>;
@@ -124,6 +132,7 @@
                        compatible = "actions,s500-uart", "actions,owl-uart";
                        reg = <0xb0120000 0x2000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cmu CLK_UART0>;
                        status = "disabled";
                };
 
@@ -131,6 +140,7 @@
                        compatible = "actions,s500-uart", "actions,owl-uart";
                        reg = <0xb0122000 0x2000>;
                        interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cmu CLK_UART1>;
                        status = "disabled";
                };
 
@@ -138,6 +148,7 @@
                        compatible = "actions,s500-uart", "actions,owl-uart";
                        reg = <0xb0124000 0x2000>;
                        interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cmu CLK_UART2>;
                        status = "disabled";
                };
 
@@ -145,6 +156,7 @@
                        compatible = "actions,s500-uart", "actions,owl-uart";
                        reg = <0xb0126000 0x2000>;
                        interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cmu CLK_UART3>;
                        status = "disabled";
                };
 
@@ -152,6 +164,7 @@
                        compatible = "actions,s500-uart", "actions,owl-uart";
                        reg = <0xb0128000 0x2000>;
                        interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cmu CLK_UART4>;
                        status = "disabled";
                };
 
@@ -159,6 +172,7 @@
                        compatible = "actions,s500-uart", "actions,owl-uart";
                        reg = <0xb012a000 0x2000>;
                        interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cmu CLK_UART5>;
                        status = "disabled";
                };
 
@@ -166,9 +180,17 @@
                        compatible = "actions,s500-uart", "actions,owl-uart";
                        reg = <0xb012c000 0x2000>;
                        interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cmu CLK_UART6>;
                        status = "disabled";
                };
 
+               cmu: clock-controller@b0160000 {
+                       compatible = "actions,s500-cmu";
+                       reg = <0xb0160000 0x8000>;
+                       clocks = <&hosc>, <&losc>;
+                       #clock-cells = <1>;
+               };
+
                timer: timer@b0168000 {
                        compatible = "actions,s500-timer";
                        reg = <0xb0168000 0x8000>;
-- 
2.17.1