Hi Matti, Thank you for the patch! Yet something to improve:
[auto build test ERROR on regmap/for-next] [also build test ERROR on next-20181218] [cannot apply to v4.20-rc7] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Matti-Vaittinen/regmap-regmap-irq-gpio-max77620-add-level-irq-support/20181218-225844 base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap.git for-next config: x86_64-randconfig-x006-201850 (attached as .config) compiler: gcc-7 (Debian 7.3.0-1) 7.3.0 reproduce: # save the attached .config to linux build tree make ARCH=x86_64 All errors (new ones prefixed by >>): drivers/base/regmap/regmap-irq.c: In function 'regmap_add_irq_chip': >> drivers/base/regmap/regmap-irq.c:644:24: error: 'const struct regmap_irq' >> has no member named 'type_reg_offset'; did you mean 'reg_offset'? reg = chip->irqs[i].type_reg_offset / map->reg_stride; ^~~~~~~~~~~~~~~ reg_offset >> drivers/base/regmap/regmap-irq.c:645:41: error: 'const struct regmap_irq' >> has no member named 'type_rising_mask' d->type_buf_def[reg] |= chip->irqs[i].type_rising_mask | ^ >> drivers/base/regmap/regmap-irq.c:646:19: error: 'const struct regmap_irq' >> has no member named 'type_falling_mask' chip->irqs[i].type_falling_mask; ^ vim +644 drivers/base/regmap/regmap-irq.c 4af8be67f Mark Brown 2012-05-13 446 f8beab2bb Mark Brown 2011-10-28 447 /** 2cf8e2dfd Charles Keepax 2017-01-12 448 * regmap_add_irq_chip() - Use standard regmap IRQ controller handling f8beab2bb Mark Brown 2011-10-28 449 * 2cf8e2dfd Charles Keepax 2017-01-12 450 * @map: The regmap for the device. 2cf8e2dfd Charles Keepax 2017-01-12 451 * @irq: The IRQ the device uses to signal interrupts. 2cf8e2dfd Charles Keepax 2017-01-12 452 * @irq_flags: The IRQF_ flags to use for the primary interrupt. 2cf8e2dfd Charles Keepax 2017-01-12 453 * @irq_base: Allocate at specific IRQ number if irq_base > 0. 2cf8e2dfd Charles Keepax 2017-01-12 454 * @chip: Configuration for the interrupt controller. 2cf8e2dfd Charles Keepax 2017-01-12 455 * @data: Runtime data structure for the controller, allocated on success. f8beab2bb Mark Brown 2011-10-28 456 * f8beab2bb Mark Brown 2011-10-28 457 * Returns 0 on success or an errno on failure. f8beab2bb Mark Brown 2011-10-28 458 * f8beab2bb Mark Brown 2011-10-28 459 * In order for this to be efficient the chip really should use a f8beab2bb Mark Brown 2011-10-28 460 * register cache. The chip driver is responsible for restoring the f8beab2bb Mark Brown 2011-10-28 461 * register values used by the IRQ controller over suspend and resume. f8beab2bb Mark Brown 2011-10-28 462 */ f8beab2bb Mark Brown 2011-10-28 463 int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, b026ddbbd Mark Brown 2012-05-31 464 int irq_base, const struct regmap_irq_chip *chip, f8beab2bb Mark Brown 2011-10-28 465 struct regmap_irq_chip_data **data) f8beab2bb Mark Brown 2011-10-28 466 { f8beab2bb Mark Brown 2011-10-28 467 struct regmap_irq_chip_data *d; 4af8be67f Mark Brown 2012-05-13 468 int i; f8beab2bb Mark Brown 2011-10-28 469 int ret = -ENOMEM; bc998a730 Bartosz Golaszewski 2018-12-07 470 int num_type_reg; 16032624f Stephen Warren 2012-07-27 471 u32 reg; 7b7d1968e Guo Zeng 2015-09-17 472 u32 unmask_offset; f8beab2bb Mark Brown 2011-10-28 473 e12892070 Xiubo Li 2014-05-19 474 if (chip->num_regs <= 0) e12892070 Xiubo Li 2014-05-19 475 return -EINVAL; e12892070 Xiubo Li 2014-05-19 476 f01ee60ff Stephen Warren 2012-04-09 477 for (i = 0; i < chip->num_irqs; i++) { f01ee60ff Stephen Warren 2012-04-09 478 if (chip->irqs[i].reg_offset % map->reg_stride) f01ee60ff Stephen Warren 2012-04-09 479 return -EINVAL; f01ee60ff Stephen Warren 2012-04-09 480 if (chip->irqs[i].reg_offset / map->reg_stride >= f01ee60ff Stephen Warren 2012-04-09 481 chip->num_regs) f01ee60ff Stephen Warren 2012-04-09 482 return -EINVAL; f01ee60ff Stephen Warren 2012-04-09 483 } f01ee60ff Stephen Warren 2012-04-09 484 4af8be67f Mark Brown 2012-05-13 485 if (irq_base) { f8beab2bb Mark Brown 2011-10-28 486 irq_base = irq_alloc_descs(irq_base, 0, chip->num_irqs, 0); f8beab2bb Mark Brown 2011-10-28 487 if (irq_base < 0) { f8beab2bb Mark Brown 2011-10-28 488 dev_warn(map->dev, "Failed to allocate IRQs: %d\n", f8beab2bb Mark Brown 2011-10-28 489 irq_base); f8beab2bb Mark Brown 2011-10-28 490 return irq_base; f8beab2bb Mark Brown 2011-10-28 491 } 4af8be67f Mark Brown 2012-05-13 492 } f8beab2bb Mark Brown 2011-10-28 493 f8beab2bb Mark Brown 2011-10-28 494 d = kzalloc(sizeof(*d), GFP_KERNEL); f8beab2bb Mark Brown 2011-10-28 495 if (!d) f8beab2bb Mark Brown 2011-10-28 496 return -ENOMEM; f8beab2bb Mark Brown 2011-10-28 497 eeda1bd69 lixiubo 2015-11-20 498 d->status_buf = kcalloc(chip->num_regs, sizeof(unsigned int), f8beab2bb Mark Brown 2011-10-28 499 GFP_KERNEL); f8beab2bb Mark Brown 2011-10-28 500 if (!d->status_buf) f8beab2bb Mark Brown 2011-10-28 501 goto err_alloc; f8beab2bb Mark Brown 2011-10-28 502 eeda1bd69 lixiubo 2015-11-20 503 d->mask_buf = kcalloc(chip->num_regs, sizeof(unsigned int), f8beab2bb Mark Brown 2011-10-28 504 GFP_KERNEL); f8beab2bb Mark Brown 2011-10-28 505 if (!d->mask_buf) f8beab2bb Mark Brown 2011-10-28 506 goto err_alloc; f8beab2bb Mark Brown 2011-10-28 507 eeda1bd69 lixiubo 2015-11-20 508 d->mask_buf_def = kcalloc(chip->num_regs, sizeof(unsigned int), f8beab2bb Mark Brown 2011-10-28 509 GFP_KERNEL); f8beab2bb Mark Brown 2011-10-28 510 if (!d->mask_buf_def) f8beab2bb Mark Brown 2011-10-28 511 goto err_alloc; f8beab2bb Mark Brown 2011-10-28 512 a43fd50dc Mark Brown 2012-06-05 513 if (chip->wake_base) { eeda1bd69 lixiubo 2015-11-20 514 d->wake_buf = kcalloc(chip->num_regs, sizeof(unsigned int), a43fd50dc Mark Brown 2012-06-05 515 GFP_KERNEL); a43fd50dc Mark Brown 2012-06-05 516 if (!d->wake_buf) a43fd50dc Mark Brown 2012-06-05 517 goto err_alloc; a43fd50dc Mark Brown 2012-06-05 518 } a43fd50dc Mark Brown 2012-06-05 519 bc998a730 Bartosz Golaszewski 2018-12-07 520 num_type_reg = chip->type_in_mask ? chip->num_regs : chip->num_type_reg; bc998a730 Bartosz Golaszewski 2018-12-07 521 if (num_type_reg) { bc998a730 Bartosz Golaszewski 2018-12-07 522 d->type_buf_def = kcalloc(num_type_reg, 7a78479fd Laxman Dewangan 2015-12-22 523 sizeof(unsigned int), GFP_KERNEL); 7a78479fd Laxman Dewangan 2015-12-22 524 if (!d->type_buf_def) 7a78479fd Laxman Dewangan 2015-12-22 525 goto err_alloc; 7a78479fd Laxman Dewangan 2015-12-22 526 bc998a730 Bartosz Golaszewski 2018-12-07 527 d->type_buf = kcalloc(num_type_reg, sizeof(unsigned int), 7a78479fd Laxman Dewangan 2015-12-22 528 GFP_KERNEL); 7a78479fd Laxman Dewangan 2015-12-22 529 if (!d->type_buf) 7a78479fd Laxman Dewangan 2015-12-22 530 goto err_alloc; 7a78479fd Laxman Dewangan 2015-12-22 531 } 7a78479fd Laxman Dewangan 2015-12-22 532 7ac140ec4 Stephen Warren 2012-08-01 533 d->irq_chip = regmap_irq_chip; ca142750f Stephen Warren 2012-08-01 534 d->irq_chip.name = chip->name; a43fd50dc Mark Brown 2012-06-05 535 d->irq = irq; f8beab2bb Mark Brown 2011-10-28 536 d->map = map; f8beab2bb Mark Brown 2011-10-28 537 d->chip = chip; f8beab2bb Mark Brown 2011-10-28 538 d->irq_base = irq_base; 022f926a2 Graeme Gregory 2012-05-14 539 022f926a2 Graeme Gregory 2012-05-14 540 if (chip->irq_reg_stride) 022f926a2 Graeme Gregory 2012-05-14 541 d->irq_reg_stride = chip->irq_reg_stride; 022f926a2 Graeme Gregory 2012-05-14 542 else 022f926a2 Graeme Gregory 2012-05-14 543 d->irq_reg_stride = 1; 022f926a2 Graeme Gregory 2012-05-14 544 7a78479fd Laxman Dewangan 2015-12-22 545 if (chip->type_reg_stride) 7a78479fd Laxman Dewangan 2015-12-22 546 d->type_reg_stride = chip->type_reg_stride; 7a78479fd Laxman Dewangan 2015-12-22 547 else 7a78479fd Laxman Dewangan 2015-12-22 548 d->type_reg_stride = 1; 7a78479fd Laxman Dewangan 2015-12-22 549 67921a1a6 Markus Pargmann 2015-08-21 550 if (!map->use_single_read && map->reg_stride == 1 && a7440eaa9 Mark Brown 2013-01-03 551 d->irq_reg_stride == 1) { 549e08a0a lixiubo 2015-11-20 552 d->status_reg_buf = kmalloc_array(chip->num_regs, 549e08a0a lixiubo 2015-11-20 553 map->format.val_bytes, 549e08a0a lixiubo 2015-11-20 554 GFP_KERNEL); a7440eaa9 Mark Brown 2013-01-03 555 if (!d->status_reg_buf) a7440eaa9 Mark Brown 2013-01-03 556 goto err_alloc; a7440eaa9 Mark Brown 2013-01-03 557 } a7440eaa9 Mark Brown 2013-01-03 558 f8beab2bb Mark Brown 2011-10-28 559 mutex_init(&d->lock); f8beab2bb Mark Brown 2011-10-28 560 f8beab2bb Mark Brown 2011-10-28 561 for (i = 0; i < chip->num_irqs; i++) f01ee60ff Stephen Warren 2012-04-09 562 d->mask_buf_def[chip->irqs[i].reg_offset / map->reg_stride] f8beab2bb Mark Brown 2011-10-28 563 |= chip->irqs[i].mask; f8beab2bb Mark Brown 2011-10-28 564 f8beab2bb Mark Brown 2011-10-28 565 /* Mask all the interrupts by default */ f8beab2bb Mark Brown 2011-10-28 566 for (i = 0; i < chip->num_regs; i++) { f8beab2bb Mark Brown 2011-10-28 567 d->mask_buf[i] = d->mask_buf_def[i]; 16032624f Stephen Warren 2012-07-27 568 reg = chip->mask_base + 16032624f Stephen Warren 2012-07-27 569 (i * map->reg_stride * d->irq_reg_stride); 36ac914ba Xiaofan Tian 2012-08-30 570 if (chip->mask_invert) a71411dbf Michael Grzeschik 2017-06-23 571 ret = regmap_irq_update_bits(d, reg, 36ac914ba Xiaofan Tian 2012-08-30 572 d->mask_buf[i], ~d->mask_buf[i]); 7b7d1968e Guo Zeng 2015-09-17 573 else if (d->chip->unmask_base) { 7b7d1968e Guo Zeng 2015-09-17 574 unmask_offset = d->chip->unmask_base - 7b7d1968e Guo Zeng 2015-09-17 575 d->chip->mask_base; a71411dbf Michael Grzeschik 2017-06-23 576 ret = regmap_irq_update_bits(d, 7b7d1968e Guo Zeng 2015-09-17 577 reg + unmask_offset, 7b7d1968e Guo Zeng 2015-09-17 578 d->mask_buf[i], 7b7d1968e Guo Zeng 2015-09-17 579 d->mask_buf[i]); 7b7d1968e Guo Zeng 2015-09-17 580 } else a71411dbf Michael Grzeschik 2017-06-23 581 ret = regmap_irq_update_bits(d, reg, 0eb46ad0c Mark Brown 2012-08-01 582 d->mask_buf[i], d->mask_buf[i]); f8beab2bb Mark Brown 2011-10-28 583 if (ret != 0) { f8beab2bb Mark Brown 2011-10-28 584 dev_err(map->dev, "Failed to set masks in 0x%x: %d\n", 16032624f Stephen Warren 2012-07-27 585 reg, ret); f8beab2bb Mark Brown 2011-10-28 586 goto err_alloc; f8beab2bb Mark Brown 2011-10-28 587 } 2753e6f82 Philipp Zabel 2013-07-22 588 2753e6f82 Philipp Zabel 2013-07-22 589 if (!chip->init_ack_masked) 2753e6f82 Philipp Zabel 2013-07-22 590 continue; 2753e6f82 Philipp Zabel 2013-07-22 591 2753e6f82 Philipp Zabel 2013-07-22 592 /* Ack masked but set interrupts */ 2753e6f82 Philipp Zabel 2013-07-22 593 reg = chip->status_base + 2753e6f82 Philipp Zabel 2013-07-22 594 (i * map->reg_stride * d->irq_reg_stride); 2753e6f82 Philipp Zabel 2013-07-22 595 ret = regmap_read(map, reg, &d->status_buf[i]); 2753e6f82 Philipp Zabel 2013-07-22 596 if (ret != 0) { 2753e6f82 Philipp Zabel 2013-07-22 597 dev_err(map->dev, "Failed to read IRQ status: %d\n", 2753e6f82 Philipp Zabel 2013-07-22 598 ret); 2753e6f82 Philipp Zabel 2013-07-22 599 goto err_alloc; 2753e6f82 Philipp Zabel 2013-07-22 600 } 2753e6f82 Philipp Zabel 2013-07-22 601 d32334333 Alexander Shiyan 2013-12-15 602 if (d->status_buf[i] && (chip->ack_base || chip->use_ack)) { 2753e6f82 Philipp Zabel 2013-07-22 603 reg = chip->ack_base + 2753e6f82 Philipp Zabel 2013-07-22 604 (i * map->reg_stride * d->irq_reg_stride); a650fdd94 Guo Zeng 2015-09-17 605 if (chip->ack_invert) a650fdd94 Guo Zeng 2015-09-17 606 ret = regmap_write(map, reg, a650fdd94 Guo Zeng 2015-09-17 607 ~(d->status_buf[i] & d->mask_buf[i])); a650fdd94 Guo Zeng 2015-09-17 608 else 2753e6f82 Philipp Zabel 2013-07-22 609 ret = regmap_write(map, reg, 2753e6f82 Philipp Zabel 2013-07-22 610 d->status_buf[i] & d->mask_buf[i]); 2753e6f82 Philipp Zabel 2013-07-22 611 if (ret != 0) { 2753e6f82 Philipp Zabel 2013-07-22 612 dev_err(map->dev, "Failed to ack 0x%x: %d\n", 2753e6f82 Philipp Zabel 2013-07-22 613 reg, ret); 2753e6f82 Philipp Zabel 2013-07-22 614 goto err_alloc; 2753e6f82 Philipp Zabel 2013-07-22 615 } 2753e6f82 Philipp Zabel 2013-07-22 616 } f8beab2bb Mark Brown 2011-10-28 617 } f8beab2bb Mark Brown 2011-10-28 618 40052ca0c Stephen Warren 2012-08-01 619 /* Wake is disabled by default */ 40052ca0c Stephen Warren 2012-08-01 620 if (d->wake_buf) { 40052ca0c Stephen Warren 2012-08-01 621 for (i = 0; i < chip->num_regs; i++) { 40052ca0c Stephen Warren 2012-08-01 622 d->wake_buf[i] = d->mask_buf_def[i]; 40052ca0c Stephen Warren 2012-08-01 623 reg = chip->wake_base + 40052ca0c Stephen Warren 2012-08-01 624 (i * map->reg_stride * d->irq_reg_stride); 9442490a0 Mark Brown 2013-01-04 625 9442490a0 Mark Brown 2013-01-04 626 if (chip->wake_invert) a71411dbf Michael Grzeschik 2017-06-23 627 ret = regmap_irq_update_bits(d, reg, 9442490a0 Mark Brown 2013-01-04 628 d->mask_buf_def[i], 9442490a0 Mark Brown 2013-01-04 629 0); 9442490a0 Mark Brown 2013-01-04 630 else a71411dbf Michael Grzeschik 2017-06-23 631 ret = regmap_irq_update_bits(d, reg, 9442490a0 Mark Brown 2013-01-04 632 d->mask_buf_def[i], 40052ca0c Stephen Warren 2012-08-01 633 d->wake_buf[i]); 40052ca0c Stephen Warren 2012-08-01 634 if (ret != 0) { 40052ca0c Stephen Warren 2012-08-01 635 dev_err(map->dev, "Failed to set masks in 0x%x: %d\n", 40052ca0c Stephen Warren 2012-08-01 636 reg, ret); 40052ca0c Stephen Warren 2012-08-01 637 goto err_alloc; 40052ca0c Stephen Warren 2012-08-01 638 } 40052ca0c Stephen Warren 2012-08-01 639 } 40052ca0c Stephen Warren 2012-08-01 640 } 40052ca0c Stephen Warren 2012-08-01 641 bc998a730 Bartosz Golaszewski 2018-12-07 642 if (chip->num_type_reg && !chip->type_in_mask) { 7a78479fd Laxman Dewangan 2015-12-22 643 for (i = 0; i < chip->num_irqs; i++) { 7a78479fd Laxman Dewangan 2015-12-22 @644 reg = chip->irqs[i].type_reg_offset / map->reg_stride; 7a78479fd Laxman Dewangan 2015-12-22 @645 d->type_buf_def[reg] |= chip->irqs[i].type_rising_mask | 7a78479fd Laxman Dewangan 2015-12-22 @646 chip->irqs[i].type_falling_mask; 7a78479fd Laxman Dewangan 2015-12-22 647 } 7a78479fd Laxman Dewangan 2015-12-22 648 for (i = 0; i < chip->num_type_reg; ++i) { 7a78479fd Laxman Dewangan 2015-12-22 649 if (!d->type_buf_def[i]) 7a78479fd Laxman Dewangan 2015-12-22 650 continue; 7a78479fd Laxman Dewangan 2015-12-22 651 7a78479fd Laxman Dewangan 2015-12-22 652 reg = chip->type_base + 7a78479fd Laxman Dewangan 2015-12-22 653 (i * map->reg_stride * d->type_reg_stride); 7a78479fd Laxman Dewangan 2015-12-22 654 if (chip->type_invert) a71411dbf Michael Grzeschik 2017-06-23 655 ret = regmap_irq_update_bits(d, reg, 7a78479fd Laxman Dewangan 2015-12-22 656 d->type_buf_def[i], 0xFF); 7a78479fd Laxman Dewangan 2015-12-22 657 else a71411dbf Michael Grzeschik 2017-06-23 658 ret = regmap_irq_update_bits(d, reg, 7a78479fd Laxman Dewangan 2015-12-22 659 d->type_buf_def[i], 0x0); 7a78479fd Laxman Dewangan 2015-12-22 660 if (ret != 0) { 7a78479fd Laxman Dewangan 2015-12-22 661 dev_err(map->dev, 7a78479fd Laxman Dewangan 2015-12-22 662 "Failed to set type in 0x%x: %x\n", 7a78479fd Laxman Dewangan 2015-12-22 663 reg, ret); 7a78479fd Laxman Dewangan 2015-12-22 664 goto err_alloc; 7a78479fd Laxman Dewangan 2015-12-22 665 } 7a78479fd Laxman Dewangan 2015-12-22 666 } 7a78479fd Laxman Dewangan 2015-12-22 667 } 7a78479fd Laxman Dewangan 2015-12-22 668 4af8be67f Mark Brown 2012-05-13 669 if (irq_base) 4af8be67f Mark Brown 2012-05-13 670 d->domain = irq_domain_add_legacy(map->dev->of_node, 4af8be67f Mark Brown 2012-05-13 671 chip->num_irqs, irq_base, 0, 4af8be67f Mark Brown 2012-05-13 672 ®map_domain_ops, d); 4af8be67f Mark Brown 2012-05-13 673 else 4af8be67f Mark Brown 2012-05-13 674 d->domain = irq_domain_add_linear(map->dev->of_node, 4af8be67f Mark Brown 2012-05-13 675 chip->num_irqs, 4af8be67f Mark Brown 2012-05-13 676 ®map_domain_ops, d); 4af8be67f Mark Brown 2012-05-13 677 if (!d->domain) { 4af8be67f Mark Brown 2012-05-13 678 dev_err(map->dev, "Failed to create IRQ domain\n"); 4af8be67f Mark Brown 2012-05-13 679 ret = -ENOMEM; 4af8be67f Mark Brown 2012-05-13 680 goto err_alloc; f8beab2bb Mark Brown 2011-10-28 681 } f8beab2bb Mark Brown 2011-10-28 682 09cadf6e0 Valentin Rothberg 2015-02-11 683 ret = request_threaded_irq(irq, NULL, regmap_irq_thread, 09cadf6e0 Valentin Rothberg 2015-02-11 684 irq_flags | IRQF_ONESHOT, f8beab2bb Mark Brown 2011-10-28 685 chip->name, d); f8beab2bb Mark Brown 2011-10-28 686 if (ret != 0) { eed456f93 Mark Brown 2013-03-19 687 dev_err(map->dev, "Failed to request IRQ %d for %s: %d\n", eed456f93 Mark Brown 2013-03-19 688 irq, chip->name, ret); 4af8be67f Mark Brown 2012-05-13 689 goto err_domain; f8beab2bb Mark Brown 2011-10-28 690 } f8beab2bb Mark Brown 2011-10-28 691 72a6a5df2 Krzysztof Kozlowski 2014-03-13 692 *data = d; 72a6a5df2 Krzysztof Kozlowski 2014-03-13 693 f8beab2bb Mark Brown 2011-10-28 694 return 0; f8beab2bb Mark Brown 2011-10-28 695 4af8be67f Mark Brown 2012-05-13 696 err_domain: 4af8be67f Mark Brown 2012-05-13 697 /* Should really dispose of the domain but... */ f8beab2bb Mark Brown 2011-10-28 698 err_alloc: 7a78479fd Laxman Dewangan 2015-12-22 699 kfree(d->type_buf); 7a78479fd Laxman Dewangan 2015-12-22 700 kfree(d->type_buf_def); a43fd50dc Mark Brown 2012-06-05 701 kfree(d->wake_buf); f8beab2bb Mark Brown 2011-10-28 702 kfree(d->mask_buf_def); f8beab2bb Mark Brown 2011-10-28 703 kfree(d->mask_buf); f8beab2bb Mark Brown 2011-10-28 704 kfree(d->status_buf); a7440eaa9 Mark Brown 2013-01-03 705 kfree(d->status_reg_buf); f8beab2bb Mark Brown 2011-10-28 706 kfree(d); f8beab2bb Mark Brown 2011-10-28 707 return ret; f8beab2bb Mark Brown 2011-10-28 708 } f8beab2bb Mark Brown 2011-10-28 709 EXPORT_SYMBOL_GPL(regmap_add_irq_chip); f8beab2bb Mark Brown 2011-10-28 710 :::::: The code at line 644 was first introduced by commit :::::: 7a78479fd2acd25db7ecd1744d76f6841ec8a257 regmap: irq: add support for configuration of trigger type :::::: TO: Laxman Dewangan <ldewan...@nvidia.com> :::::: CC: Mark Brown <broo...@kernel.org> --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
.config.gz
Description: application/gzip
