PCIE PHY IP block on i.MX7D differs from the one used on i.MX6 family, so none of the code in current implementation of imx6_setup_phy_mpll() is applicable.
Cc: [email protected] Cc: Fabio Estevam <[email protected]> Cc: [email protected] Cc: [email protected] Cc: Leonard Crestez <[email protected]> Cc: "A.s. Dong" <[email protected]> Cc: Richard Zhu <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Signed-off-by: Andrey Smirnov <[email protected]> --- drivers/pci/controller/dwc/pci-imx6.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 2cbef2d7c207..c140f7987598 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -525,6 +525,9 @@ static int imx6_setup_phy_mpll(struct imx6_pcie *imx6_pcie) int mult, div; u32 val; + if (imx6_pcie->variant == IMX7D) + return 0; + switch (phy_rate) { case 125000000: /* -- 2.19.1
