On 07/10/2007 05:03 AM, Juergen Beisert wrote:
[cc: Andi]
> From: Juergen Beisert <[EMAIL PROTECTED]>
>
> 2nd try to include it into mainline.
>
> Replace NSC/Cyrix specific chipset access macros by inlined functions.
> With the macros a line like this fails (and does nothing):
> setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88);
> With inlined functions this line will work as expected.
>
> Note about a side effect: Seems on Geode GX1 based systems the
> "suspend on halt power saving feature" was never enabled due to this
> wrong macro expansion. With inlined functions it will be enabled, but
> this will stop the TSC when the CPU runs into a HLT instruction.
> Kernel output something like this:
> Clocksource tsc unstable (delta = -472746897 ns)
>
> Signed-off-by: Juergen Beisert <[EMAIL PROTECTED]>
>
> Index: include/asm-i386/processor.h
> ===================================================================
> --- include/asm-i386/processor.h.orig
> +++ include/asm-i386/processor.h
> @@ -168,17 +168,6 @@ static inline void clear_in_cr4 (unsigne
> write_cr4(cr4);
> }
>
> -/*
> - * NSC/Cyrix CPU indexed register access macros
> - */
> -
> -#define getCx86(reg) ({ outb((reg), 0x22); inb(0x23); })
> -
> -#define setCx86(reg, data) do { \
> - outb((reg), 0x22); \
> - outb((data), 0x23); \
> -} while (0)
> -
> /* Stop speculative execution */
> static inline void sync_core(void)
> {
> Index: include/asm-i386/processor-cyrix.h
> ===================================================================
> --- /dev/null
> +++ include/asm-i386/processor-cyrix.h
> @@ -0,0 +1,15 @@
> +/*
> + * NSC/Cyrix CPU indexed register access. Must be inlined instead of
> + * macros to ensure correct access ordering
> + */
> +static inline u8 getCx86(u8 reg)
> +{
> + outb(reg, 0x22);
> + return inb(0x23);
> +}
> +
> +static inline void setCx86(u8 reg, u8 data)
> +{
> + outb(reg, 0x22);
> + outb(data, 0x23);
> +}
> Index: arch/i386/kernel/cpu/cyrix.c
> ===================================================================
> --- arch/i386/kernel/cpu/cyrix.c.orig
> +++ arch/i386/kernel/cpu/cyrix.c
> @@ -4,7 +4,7 @@
> #include <linux/pci.h>
> #include <asm/dma.h>
> #include <asm/io.h>
> -#include <asm/processor.h>
> +#include <asm/processor-cyrix.h>
> #include <asm/timer.h>
> #include <asm/pci-direct.h>
> #include <asm/tsc.h>
> Index: arch/i386/kernel/cpu/mtrr/cyrix.c
> ===================================================================
> --- arch/i386/kernel/cpu/mtrr/cyrix.c.orig
> +++ arch/i386/kernel/cpu/mtrr/cyrix.c
> @@ -3,6 +3,7 @@
> #include <asm/mtrr.h>
> #include <asm/msr.h>
> #include <asm/io.h>
> +#include <asm/processor-cyrix.h>
> #include "mtrr.h"
>
> int arr3_protected;
> Index: arch/i386/kernel/cpu/cpufreq/gx-suspmod.c
> ===================================================================
> --- arch/i386/kernel/cpu/cpufreq/gx-suspmod.c.orig
> +++ arch/i386/kernel/cpu/cpufreq/gx-suspmod.c
> @@ -79,7 +79,7 @@
> #include <linux/smp.h>
> #include <linux/cpufreq.h>
> #include <linux/pci.h>
> -#include <asm/processor.h>
> +#include <asm/processor-cyrix.h>
> #include <asm/errno.h>
>
> /* PCI config registers, all at F0 */
> Index: include/asm-x86_64/processor.h
> ===================================================================
> --- include/asm-x86_64/processor.h.orig
> +++ include/asm-x86_64/processor.h
> @@ -391,17 +391,6 @@ static inline void prefetchw(void *x)
>
> #define cpu_relax() rep_nop()
>
> -/*
> - * NSC/Cyrix CPU indexed register access macros
> - */
> -
> -#define getCx86(reg) ({ outb((reg), 0x22); inb(0x23); })
> -
> -#define setCx86(reg, data) do { \
> - outb((reg), 0x22); \
> - outb((data), 0x23); \
> -} while (0)
> -
> static inline void serialize_cpu(void)
> {
> __asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");
> -
-
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