On Sat, Oct 20, 2018 at 11:42:59PM +0200, KarimAllah Ahmed wrote:
> The spec only requires the posted interrupt descriptor address to be
> 64-bytes aligned (i.e. bits[0:5] == 0). Using page_address_valid also
> forces the address to be page aligned.
>
> Only validate that the address does not cross the maximum physical address
> without enforcing a page alignment.
>
> Cc: Paolo Bonzini <pbonz...@redhat.com>
> Cc: Radim Krčmář <rkrc...@redhat.com>
> Cc: Thomas Gleixner <t...@linutronix.de>
> Cc: Ingo Molnar <mi...@redhat.com>
> Cc: Borislav Petkov <b...@alien8.de>
> Cc: H. Peter Anvin <h...@zytor.com>
> Cc: x...@kernel.org
> Cc: k...@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Fixes: 6de84e581c0 ("nVMX x86: check posted-interrupt descriptor addresss on
> vmentry of L2")
> Signed-off-by: KarimAllah Ahmed <karah...@amazon.de>
> ---
> arch/x86/kvm/vmx.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index 30bf860..47962f2 100644
> --- a/arch/x86/kvm/vmx.c
> +++ b/arch/x86/kvm/vmx.c
> @@ -11668,7 +11668,7 @@ static int nested_vmx_check_apicv_controls(struct
> kvm_vcpu *vcpu,
> !nested_exit_intr_ack_set(vcpu) ||
> (vmcs12->posted_intr_nv & 0xff00) ||
> (vmcs12->posted_intr_desc_addr & 0x3f) ||
> - (!page_address_valid(vcpu, vmcs12->posted_intr_desc_addr))))
> + (vmcs12->posted_intr_desc_addr >> cpuid_maxphyaddr(vcpu)))
> return -EINVAL;
Can you update the comment for this code block? It has a stale blurb
about "the descriptor address has been already checked in
nested_get_vmcs12_pages" and it'd be nice to state why bits[5:0] must
be zero (your changelog is much more helpful than the current comment).
With that:
Reviewed-by: Sean Christopherson <sean.j.christopher...@intel.com>
>
> /* tpr shadow is needed by all apicv features. */
> --
> 2.7.4
>
