> -----Original Message-----
> From: Radhey Shyam Pandey <radhey.shyam.pan...@xilinx.com>
> Sent: Saturday, September 29, 2018 10:48 PM
> To: vk...@kernel.org; dan.j.willi...@intel.com; Michal Simek
> <mich...@xilinx.com>; Appana Durga Kedareswara Rao
> <appa...@xilinx.com>; Radhey Shyam Pandey <radh...@xilinx.com>
> Cc: dmaeng...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
> ker...@vger.kernel.org
> Subject: [PATCH v2 4/4] dmaengine: xilinx_dma: Fix 64-bit simple CDMA
> transfer
> 
> In AXI CDMA simple mode also pass MSB bits of source and destination
> address to xilinx_write function. This fixes simple CDMA operation mode using
> 64-bit addressing.
> 
> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pan...@xilinx.com>
> Signed-off-by: Michal Simek <michal.si...@xilinx.com>

Reviewed-by: Appana Durga Kedareswara Rao <appana.durga....@xilinx.com>

Regards,
Kedar.

> ---
> Changes for v2:
> Use helper macro for preparing dma_addr_t.
> ---
>  drivers/dma/xilinx/xilinx_dma.c |    6 ++++--
>  1 files changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
> index c27ab64..d04ef85 100644
> --- a/drivers/dma/xilinx/xilinx_dma.c
> +++ b/drivers/dma/xilinx/xilinx_dma.c
> @@ -1247,8 +1247,10 @@ static void xilinx_cdma_start_transfer(struct
> xilinx_dma_chan *chan)
> 
>               hw = &segment->hw;
> 
> -             xilinx_write(chan, XILINX_CDMA_REG_SRCADDR, hw-
> >src_addr);
> -             xilinx_write(chan, XILINX_CDMA_REG_DSTADDR, hw-
> >dest_addr);
> +             xilinx_write(chan, XILINX_CDMA_REG_SRCADDR,
> +                          xilinx_prep_dma_addr_t(hw->src_addr));
> +             xilinx_write(chan, XILINX_CDMA_REG_DSTADDR,
> +                          xilinx_prep_dma_addr_t(hw->dest_addr));
> 
>               /* Start the transfer */
>               dma_ctrl_write(chan, XILINX_DMA_REG_BTT,
> --
> 1.7.1

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