From: Marcel Ziswiler <marcel.ziswi...@toradex.com>

Add proper eMMC vmmc and vqmmc supplies e.g. fixing signalling voltage.

Signed-off-by: Marcel Ziswiler <marcel.ziswi...@toradex.com>

---

Changes in v2: None

 arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 2 ++
 arch/arm/boot/dts/tegra124-apalis.dtsi      | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi 
b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
index 14114bc43e38..3408317c0f00 100644
--- a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
@@ -1917,6 +1917,8 @@
                status = "okay";
                bus-width = <8>;
                non-removable;
+               vmmc-supply = <&reg_module_3v3>; /* VCC */
+               vqmmc-supply = <&reg_1v8_vddio>; /* VCCQ */
        };
 
        /* CPU DFLL clock */
diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi 
b/arch/arm/boot/dts/tegra124-apalis.dtsi
index 955adebc9e90..ba6fc2e51b2d 100644
--- a/arch/arm/boot/dts/tegra124-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis.dtsi
@@ -1946,6 +1946,8 @@
                status = "okay";
                bus-width = <8>;
                non-removable;
+               vmmc-supply = <&reg_module_3v3>; /* VCC */
+               vqmmc-supply = <&reg_1v8_vddio>; /* VCCQ */
        };
 
        /* CPU DFLL clock */
-- 
2.14.4

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