Hi Andy,
> Am 11.04.2018 um 07:00 schrieb H. Nikolaus Schaller <h...@goldelico.com>:
>
> Hi Andy,
>
>> Am 10.04.2018 um 20:06 schrieb Andy Shevchenko <andy.shevche...@gmail.com>:
>>
>> On Tue, Apr 10, 2018 at 7:07 PM, H. Nikolaus Schaller <h...@goldelico.com>
>> wrote:
>>> PCAL chips ("L" seems to stand for "latched") have additional
>>> registers starting at address 0x40 to control the latches,
>>> interrupt mask, pull-up and pull down etc.
>>>
>>> The constants are so far defined in a way that they fit for
>>> the pcal9555a when shifted by the number of banks, i.e. multiplied
>>> by 2.
>>>
>>> Now the pcal6524 has 3 banks which means the relative offset
>>> must be multiplied by 4 which gives a wrong result if not done
>>> carefully, since the base offset is already included in the offset.
>>>
>>> For the basic registers shared with all pca93xx/tca64xx chips
>>> there is no such offset.
>>>
>>> Therefore, we add code to adjust the register number for exended
>>> registers to the 24 bit accessor functions.
>>>
>>> And we add additional register offset constants (not yet used by
>>> the driver code) which are specific to the pcal6524.
>>>
>>
>> First of all, as I said, please split this to two patches. Don't mix the
>> things.
>
> Ok. Queued for v4.
>
>>
>>
>>> + /* adjust register address for pcal6524 */
>>> + if (reg >= PCAL953X_OUT_STRENGTH)
>>> + reg -= PCAL953X_OUT_STRENGTH >> 1;
>>> +
>>
>> Give me some days to think about it.
Any news on this?
I am waiting for your advice before submitting v4 (with pending updates for the
other patches).
> No problem. I'll wait with v4.
>
> The only alternative I would see is to add new accessor function
> pointers for the extended registers and have 0x00 based offsets,
> but that is IMHO more ugly.
>
> BR and thanks,
> Nikolaus
BR and thanks,
Nikolaus
