On Tue, Apr 24, 2018 at 10:42:32AM +0800, Alison Wang wrote:
> In the situation that DE and SE aren’t shared the same interrupt number,
> the Global SE interrupts mask bit MASK_IRQ_EN in MASKIRQ must be set, or
> else other mask bits will not work and no SE interrupt will occur. This
> patch enables MASK_IRQ_EN for SE to fix this problem.
>
> Signed-off-by: Alison Wang <alison.w...@nxp.com>
Acked-by: Liviu Dudau <liviu.du...@arm.com>
Thanks for catching this! I'll pull the patch into the mali-dp tree.
Best regards,
Liviu
> ---
> drivers/gpu/drm/arm/malidp_hw.c | 3 ++-
> 1 files changed, 2 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/gpu/drm/arm/malidp_hw.c b/drivers/gpu/drm/arm/malidp_hw.c
> index d789b46..069783e 100644
> --- a/drivers/gpu/drm/arm/malidp_hw.c
> +++ b/drivers/gpu/drm/arm/malidp_hw.c
> @@ -634,7 +634,8 @@ static int malidp650_query_hw(struct malidp_hw_device
> *hwdev)
> .vsync_irq = MALIDP500_DE_IRQ_VSYNC,
> },
> .se_irq_map = {
> - .irq_mask = MALIDP500_SE_IRQ_CONF_MODE,
> + .irq_mask = MALIDP500_SE_IRQ_CONF_MODE |
> + MALIDP500_SE_IRQ_GLOBAL,
> .vsync_irq = 0,
> },
> .dc_irq_map = {
> --
> 1.7.1
>
--
====================
| I would like to |
| fix the world, |
| but they're not |
| giving me the |
\ source code! /
---------------
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