It is not immediately obvious what the expected inputs to these fault
handlers is and how they calculate the number of unset bytes. Having
stared deeply at this in order to fix some corner cases, add some
comments to addist those who follow.

Signed-off-by: Matt Redfearn <[email protected]>
---

Changes in v2:
- Add comments to fault handlers in new, separate, patch.

 arch/mips/lib/memset.S | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/mips/lib/memset.S b/arch/mips/lib/memset.S
index 1cc306520a55..a06dabe99d4b 100644
--- a/arch/mips/lib/memset.S
+++ b/arch/mips/lib/memset.S
@@ -231,16 +231,25 @@
 
 #ifdef CONFIG_CPU_MIPSR6
 .Lbyte_fixup\@:
+       /*
+        * unset_bytes = current_addr + 1
+        *      a2     =      t0      + 1
+        */
        PTR_SUBU        a2, $0, t0
        jr              ra
         PTR_ADDIU      a2, 1
 #endif /* CONFIG_CPU_MIPSR6 */
 
 .Lfirst_fixup\@:
+       /* unset_bytes already in a2 */
        jr      ra
         nop
 
 .Lfwd_fixup\@:
+       /*
+        * unset_bytes = partial_start_addr +  #bytes   -     fault_addr
+        *      a2     =         t1         + (a2 & 3f) - $28->task->BUADDR
+        */
        PTR_L           t0, TI_TASK($28)
        andi            a2, 0x3f
        LONG_L          t0, THREAD_BUADDR(t0)
@@ -249,6 +258,10 @@
         LONG_SUBU      a2, t0
 
 .Lpartial_fixup\@:
+       /*
+        * unset_bytes = partial_end_addr +      #bytes     -     fault_addr
+        *      a2     =       a0         + (a2 & STORMASK) - $28->task->BUADDR
+        */
        PTR_L           t0, TI_TASK($28)
        andi            a2, STORMASK
        LONG_L          t0, THREAD_BUADDR(t0)
@@ -257,10 +270,15 @@
         LONG_SUBU      a2, t0
 
 .Llast_fixup\@:
+       /* unset_bytes already in a2 */
        jr              ra
         nop
 
 .Lsmall_fixup\@:
+       /*
+        * unset_bytes = end_addr - current_addr + 1
+        *      a2     =    t1    -      a0      + 1
+        */
        PTR_SUBU        a2, t1, a0
        jr              ra
         PTR_ADDIU      a2, 1
-- 
2.7.4

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