On Tue, 17 Apr 2018, David Wang wrote:
> > On Mon, Apr 16, 2018 at 05:26:56PM +0800, David Wang wrote:
> > > PCI bridges integrated in new VIA chipset/SoC have no DAC issue.
> > > Enable DAC for the platforms with these chipset/SoC can improve DMA
> > > performance about 20% when DRAM size > 4GB.
> > >
> >
> > So we get an exception to an exception? Is there any way to figure out
> the
> > PCI IDs actually affected?
> Yes.
>
> Do you mean we should list the PCI IDs of the PCI bridges which have no DAC
> issue?
The question was rather to have a list of PCI IDs for those chipsets which
have the problem and set the 'disable' flag only for those. That makes a lot
more sense than making a list of new chips which disable the disable flag.
Thanks,
tglx
