On 2018-02-01 02:48, Mark Rutland wrote:
On Thu, Jan 25, 2018 at 03:55:12PM -0800, Channagoud Kadabi wrote:
Documentation for last level cache controller device tree bindings,
client bindings usage examples.

Signed-off-by: Channagoud Kadabi <ckad...@codeaurora.org>
---
.../devicetree/bindings/arm/msm/qcom,llcc.txt | 93 ++++++++++++++++++++++
 1 file changed, 93 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt

+Example:
+
+       qcom,system-cache@1300000 {
+               compatible = "qcom,llcc-core", "syscon", "simple-mfd";
+               reg = <0x1300000 0x50000>;
+               reg-names = "llcc_base";
+
+               llcc: qcom,sdm845-llcc {
+                       compatible = "qcom,sdm845-llcc";
+                       #cache-cells = <1>;
+                       max-slices = <32>;
+               };
+
+               qcom,llcc-ecc {
+                       compatible = "qcom,llcc-ecc";
+               };
+
+               qcom,llcc-amon {
+                       compatible = "qcom,llcc-amon";
+                       qcom,fg-cnt = <0x7>;
+               };
+
+       };

The "qcom,llcc-ecc" and "qcom,llcc-amon" bindings doesn't seem to be
used by the driver in patch 2, and it's not clear how they are intended
to be used, so I think they should go from the binding for now.

Sure I can remove them for now and add them when the I push other drivers
for review.


I don't think you need syscon and simple-mfd, and I think you can

I used syscon and simple-mfd because three drivers touch the same address space.

Driver 1:
system cache core: The purpose of the driver is to partition the system cache and program the settings such as priority, lines to probe while doing a look up
in the system cache, low power related settings etc.
The driver also provides API for clients to query the cache slice details,
activate and deactivate them.

Driver 2:
ECC to detect single and double bit errors in LLCC memory.
Implemented using EDAC framework.

Driver 3:
AMON: Activity Monitor to detect live lock ups in the HW block.
Implemented as SOC driver similar to driver #1.

Since the hardware block has multiple functional units the driver is implemented
to use syscon/regmap interface.

simplify the binding to a single node like:

        qcom,system-cache@1300000 {
                compatible = "qcom,sdm845-llcc";
                reg = <0x1300000 0x50000>;
                #cache-slice-cells = <1>;
                max-slices = <32>;
        }

If ECC and AMON are option features, we can always add boolean
properties for those later, e.g. "has-ecc".

Thanks,
Mark.

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