"H. Peter Anvin" <[EMAIL PROTECTED]> writes: > Eric W. Biederman wrote: >> >> Even on 386 and 486 class cpus? >> > > Yes, even on 386 and 486 class CPUs. I have personally tested this on > machines as old as the original "double sigma" 386-16.
Ok. If you have tested on a wide variety of machines then I won't worry about it. I guess if a cr0 write has always been synchronizing things should be a safe practice. The practical danger is if you write to cr0 and the pipeline is not flushed and the segment loads might execute as 16bit mode segment register loads. I think this is more of a 486 or 586/Pentium danger actually then a 386 one. Hmm. I'm not certain about enabling protected mode but enabling paging at least does appear to be documented to require a jump, before the P6 core. Which may be why it is recommended for initializing protected mode. Eric - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
