On Wed, Dec 13, 2017 at 07:55:41PM +0530, Abhishek Sahu wrote: > PCIE and NSS has MISC reset register in which single register has > multiple reset bit. The patch adds the DT bindings for these MISC > resets. > > Signed-off-by: Abhishek Sahu <abs...@codeaurora.org> > --- > include/dt-bindings/clock/qcom,gcc-ipq8074.h | 42 > ++++++++++++++++++++++++++++ > 1 file changed, 42 insertions(+)
Reviewed-by: Rob Herring <r...@kernel.org>