On Thu, Nov 30, 2017 at 04:46:40PM -0600, Tom Lendacky wrote:
> The size for the Microcode Patch Block (MPB) for an AMD family 17h
> processor is 3200 bytes. Add a #define for fam17h so that it does
> not default to 2048 bytes and fail a microcode load/update.
>
> Cc: <sta...@vger.kernel.org> # 4.1.x
> Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
> ---
> arch/x86/kernel/cpu/microcode/amd.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/x86/kernel/cpu/microcode/amd.c
> b/arch/x86/kernel/cpu/microcode/amd.c
> index c6daec4..330b846 100644
> --- a/arch/x86/kernel/cpu/microcode/amd.c
> +++ b/arch/x86/kernel/cpu/microcode/amd.c
> @@ -470,6 +470,7 @@ static unsigned int verify_patch_size(u8 family, u32
> patch_size,
> #define F14H_MPB_MAX_SIZE 1824
> #define F15H_MPB_MAX_SIZE 4096
> #define F16H_MPB_MAX_SIZE 3458
> +#define F17H_MPB_MAX_SIZE 3200
>
> switch (family) {
> case 0x14:
> @@ -481,6 +482,9 @@ static unsigned int verify_patch_size(u8 family, u32
> patch_size,
> case 0x16:
> max_size = F16H_MPB_MAX_SIZE;
> break;
> + case 0x17:
> + max_size = F17H_MPB_MAX_SIZE;
> + break;
> default:
> max_size = F1XH_MPB_MAX_SIZE;
> break;
Reviewed-by: Borislav Petkov <b...@suse.de>
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
