On Sat, 5 May 2007, Eric Dumazet wrote: > > Then add ___cacheline_aligned_in_smp or specify the alignment in the various > > other ways that exist. Practice is that most slabs specify > > SLAB_HWCACHE_ALIGN. So most slabs are cache aligned today. > > Yes but this alignement is dynamic, not at compile time. > > include/asm-i386/processor.h:739:#define cache_line_size() > (boot_cpu_data.x86_cache_alignment)
Ahh.. I did not see that before. > So adding ____cacheline_aligned to 'struct file' for example would be a > regression for people with PII or PIII Yuck. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
