On Wed, Oct 25, 2017 at 01:12:13PM +0800, rick wrote:
Commit msg?
> Signed-off-by: rick <rickche...@gmail.com>
> Signed-off-by: rick <r...@andestech.com>
Need a full name.
> Signed-off-by: Greentime Hu <green...@gmail.com>
S-o-b should be in chronological order of who touched the code. And the
sender should be last.
> ---
> .../bindings/timer/andestech,atcpit100-timer.txt | 31
> ++++++++++++++++++++
> 1 file changed, 31 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/timer/andestech,atcpit100-timer.txt
>
> diff --git
> a/Documentation/devicetree/bindings/timer/andestech,atcpit100-timer.txt
> b/Documentation/devicetree/bindings/timer/andestech,atcpit100-timer.txt
> new file mode 100644
> index 0000000..a87278a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/andestech,atcpit100-timer.txt
> @@ -0,0 +1,31 @@
> +Andestech ATCPIT100 timer
> +------------------------------------------------------------------
> +ATCPIT100 is a generic IP block from Andes Technology, embedded in
> +Andestech AE3XX platforms and other designs.
> +
> +This timer is a set of compact multi-function timers, which can be
> +used as pulse width modulators (PWM) as well as simple timers.
> +
> +It supports up to 4 PIT channels. Each PIT channel is a
> +multi-function timer and provide the following usage scenarios:
> +One 32-bit timer
> +Two 16-bit timers
> +Four 8-bit timers
> +One 16-bit PWM
> +One 16-bit timer and one 8-bit PWM
> +Two 8-bit timer and one 8-bit PWM
> +
> +Required properties:
> +- compatible : Should be "andestech,atcpit100"
> +- reg : Address and length of the register set
> +- interrupts : Reference to the timer interrupt
> +- clock-frequency : The rate in HZ in input of the Andestech ATCPIT100 timer
> +
> +Examples:
> +
> +timer0: timer@f0400000 {
> + compatible = "andestech,atcpit100";
> + reg = <0xf0400000 0x1000>;
> + interrupts = <2 4>;
> + clock-frequency = <30000000>;
> +};
> --
> 1.7.9.5
>
> --
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