Hi Tejun, On 21.8.2017 13:17, Michal Simek wrote: > From: Anurag Kumar Vulisha <anurag.kumar.vuli...@xilinx.com> > > In SATA Speed negotiation happens with OOB(Out of Band) signals. These OOB > signal timing values are configured through vendor specific registers in the > SATA controller. These OOB timings depends on the generator and detector clock > frequency, which varies from board to board (ex: ep108 and zc1751 has > different > clock frequencies). > To avoid maintaing these OOB settings in the driver, it is better to move > these > settings to the device-tree node and read from the device-tree. > > This patch does the same. > > Signed-off-by: Anurag Kumar Vulisha <anura...@xilinx.com> > Signed-off-by: Michal Simek <michal.si...@xilinx.com>
Can you please look at these patches? Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs
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