On Fri, 2007-04-27 at 12:55 -0400, Theodore Tso wrote: > On Thu, Apr 26, 2007 at 10:15:28PM -0700, Andrew Morton wrote: > > And hardware gets better. If Intel & AMD come out with a 16k pagesize > > option in a couple of years we'll look pretty dumb. If the problems which > > you're presently having with that controller get sorted out in the next > > generation of the hardware, we'll also look pretty dumb. > > Unfortunately, this isn't a problem with hardware getting better, but > a willingness to break backwards compatibility. > > x86_64 uses a 4k page size to avoid breaking 32-bit applications. And > unfortunately, iirc, even 64-bit applications are continuing to depend > on 4k page alignments for things like the text and bss segments. If > the userspace ELF and other compiler/linker specifications were > appropriate written so they could handle 16k pagesizes, maybe 5 years > from now we could move to a 16k pagesize. But this is going to > require some coordination between the userspace binutils folks and > AMD/Intel in order to plan such a migration. > > - Ted
The AMD64 psABI requires binaries to work with any page size up to 64k. Whether that's true in practice is another matter entirely, of course. -- Nicholas Miell <[EMAIL PROTECTED]> - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
