On 08/10, Quentin Schulz wrote: > This new clock driver set allows to have a fractional divided clock that > would generate a precise clock particularly suitable for audio > applications. > > The main audio pll clock has two children clocks: one that is connected > to the PMC, the other that can directly drive a pad. As these two routes > have different enable bits and different dividers and divider formulas, > they are handled by two different drivers. > > This adds the audio plls (frac, pad and pmc) to the compatible list of > at91 clocks in DT binding. > > Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com> > Acked-by: Rob Herring <r...@kernel.org> > Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com> > Acked-by: Nicolas Ferre <nicolas.fe...@microchip.com> > ---
Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
