On Fri, 21 Jul 2017 22:38:06 +0200 Arnd Bergmann <[email protected]> wrote:
> orion_nand_read_buf uses an inline assembly with the "ldrd" > instruction, which is only available from ARMv5 upwards. This > used to be fine, since all users have an ARMv5 or ARMv7 CPU, > but now we can also build a multiplatform kernel with ARMv4 > support enabled in addition to the "kirkwood" (mvebu) platform. > > This provides an alternative to call the readsl() function that > is supposed to have the same effect and is also optimized for > performance. > > I first posted a version of this patch back in 2014, and there > was some discussion about it then. This fixes the bugs identified > back then and should be a reasonable alternative for the rare > corner case. Looks good to me. Applied to nand/next. Let's see if anyone complains before the merge window. Thanks, Boris > > Link: https://patchwork.kernel.org/patch/4144791/ > Cc: Jingoo Han <[email protected]> > Signed-off-by: Arnd Bergmann <[email protected]> > --- > drivers/mtd/nand/orion_nand.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/mtd/nand/orion_nand.c b/drivers/mtd/nand/orion_nand.c > index 209170ed2b76..41cb7acfc044 100644 > --- a/drivers/mtd/nand/orion_nand.c > +++ b/drivers/mtd/nand/orion_nand.c > @@ -54,13 +54,16 @@ static void orion_nand_read_buf(struct mtd_info *mtd, > uint8_t *buf, int len) > { > struct nand_chip *chip = mtd_to_nand(mtd); > void __iomem *io_base = chip->IO_ADDR_R; > +#if __LINUX_ARM_ARCH__ >= 5 > uint64_t *buf64; > +#endif > int i = 0; > > while (len && (unsigned long)buf & 7) { > *buf++ = readb(io_base); > len--; > } > +#if __LINUX_ARM_ARCH__ >= 5 > buf64 = (uint64_t *)buf; > while (i < len/8) { > /* > @@ -74,6 +77,10 @@ static void orion_nand_read_buf(struct mtd_info *mtd, > uint8_t *buf, int len) > buf64[i++] = x; > } > i *= 8; > +#else > + readsl(io_base, buf, len/4); > + i = len / 4 * 4; > +#endif > while (i < len) > buf[i++] = readb(io_base); > }
