On 07/06/2017 11:27 PM, Balbir Singh wrote: > On Thu, 2017-07-06 at 15:52 -0600, Ross Zwisler wrote: >> # grep . mem_tgt2/* mem_tgt2/local_init/* 2>/dev/null >> mem_tgt2/firmware_id:1
This is here for folks that know their platform and know exactly the firmware ID (PXM in ACPI parlance) of a given piece of memory. Without this, we might be stuck with requiring the NUMA node ID that the kernel uses to be bound 1:1 with the firmware ID. >> mem_tgt2/is_cached:0 This tells whether the memory is cached by some other memory. MCDRAM is an example of this. It can be used as a high-bandwidth cache in front of the lower-bandwidth DRAM. This is referred to as "Memory Side Cache Information Structure" in the ACPI spec: www.uefi.org/sites/default/files/resources/ACPI_6_2.pdf >> mem_tgt2/is_enabled:1 >> mem_tgt2/is_isolated:0 This one is described in detail in the ACPI spec. It's called "Reservation hint" in there. >> mem_tgt2/phys_addr_base:0x0 >> mem_tgt2/phys_length_bytes:0x800000000 >> mem_tgt2/local_init/read_bw_MBps:30720 >> mem_tgt2/local_init/read_lat_nsec:100 >> mem_tgt2/local_init/write_bw_MBps:30720 >> mem_tgt2/local_init/write_lat_nsec:100 > > How to these numbers compare to normal system memory? They're made up in this instance. But, it's safe to expect 10x swings in bandwidth in latency, both up and down.
