[PATCH v2 1/2] dt-bindings: dmaengine: Add Mediatek High-Speed DMA controller bindings

[sean.wang]

From: Sean Wang <sean.w...@mediatek.com>

Document the devicetree bindings for Mediatek High-Speed DMA controller
which could be found on MT7623 SoC or other similar Mediatek SoCs.

Signed-off-by: Sean Wang <sean.w...@mediatek.com>
Acked-by: Rob Herring <r...@kernel.org>
---
 .../devicetree/bindings/dma/mtk-hsdma.txt          | 29 ++++++++++++++++++++++
 1 file changed, 29 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/dma/mtk-hsdma.txt

diff --git a/Documentation/devicetree/bindings/dma/mtk-hsdma.txt 
b/Documentation/devicetree/bindings/dma/mtk-hsdma.txt
new file mode 100644
index 0000000..b37e76e
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/mtk-hsdma.txt
@@ -0,0 +1,29 @@
+Mediatek High-Speed DMA Controller
+==================================
+
+This driver follows the generic DMA bindings defined in dma/dma.txt.
+
+Required properties:
+
+- compatible:  Must be one of
+                 "mediatek,mt7623-hsdma".
+- reg:         Should contain the register's base address and length.
+- interrupts:  Should contain a reference to the interrupt used by this
+               device.
+- clocks:      Should be the clock specifiers corresponding to the entry in
+               clock-names property.
+- clock-names: Should contain "hsdma" entries.
+- #dma-cells:  The length of the DMA specifier, must be <1>. This one cell
+               in dmas property of a client device represents the channel
+               number.
+Example:
+
+        hsdma: hsdma@1b007000 {
+               compatible = "mediatek,mt7623-hsdma";
+               reg = <0 0x1b007000 0 0x1000>;
+               interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_LOW>;
+               clocks = <&ethsys CLK_ETHSYS_HSDMA>;
+               clock-names = "hsdma";
+       };
+
+DMA clients must use the format described in dma/dma.txt file.
-- 
2.7.4