On Tue, 2 May 2017 07:47:40 +0200
Christophe LEROY <christophe.le...@c-s.fr> wrote:
> Le 01/05/2017 à 23:46, Brian Norris a écrit :
> > On Fri, Feb 10, 2017 at 03:01:10PM +0100, Christophe Leroy wrote:
> >> On some hardware, the nCE signal is wired to the ChipSelect associated
> >> to bus address of the NAND, so it is automatically driven during the
> >> memory access and it is not managed by a GPIO.
> >>
> >> Signed-off-by: Christophe Leroy <christophe.le...@c-s.fr>
> >
> > Not really a problem with this patch exactly, but FYI you're only making
> > this optional for the non-DT case. For device tree, this is kinda hard
> > to do, since the current binding suggests we retrieve the GPIOs based on
> > index position, not by name. So if you leave one off...I guess we well
> > just be off-by-1 on the indeces until we hit a non-optional one...which
> > I guess is "CLE".
> >
> > If we wanted this to work for DT, we'd need to extend this driver (and
> > binding doc) to support requesting GPIOs by name.
> >
>
> It works for me with devicetree.
>
> I have the following definition in my DT:
>
> nand@1,0 {
> compatible = "gpio-control-nand";
> reg = <1 0x0 0x01>;
> #address-cells = <1>;
> #size-cells = <1>;
> gpios = <&qe_pio_c 24 1 // RDY
> 0 // nCE
> &qe_pio_c 26 1 // ALE
> &qe_pio_c 25 1 // CLE
> 0>; // nwp
> };
>
Yep, it's perfectly fine to have 'empty' gpio entries (entries with
phandle set to 0/NULL), we're using this trick in the atmel_nand
driver as well.
