Patch against test11.  This patch moves the setting of %cr4 out of the
loops and makes the code a bit more readable.  Tested with standard
pagetables, PSE, and PAE.

-- 

                                                Brian Gerst
diff -urN linux-2.4.0t11p5/arch/i386/mm/init.c linux/arch/i386/mm/init.c
--- linux-2.4.0t11p5/arch/i386/mm/init.c        Mon Oct 23 17:42:33 2000
+++ linux/arch/i386/mm/init.c   Thu Nov 16 20:55:20 2000
@@ -315,7 +315,7 @@
 
 static void __init pagetable_init (void)
 {
-       unsigned long vaddr, end;
+       unsigned long vaddr, end, __pe;
        pgd_t *pgd, *pgd_base;
        int i, j, k;
        pmd_t *pmd;
@@ -334,11 +334,23 @@
                __pgd_clear(pgd);
        }
 #endif
-       i = __pgd_offset(PAGE_OFFSET);
+
+       __pe = _KERNPG_TABLE;
+       if (cpu_has_pse) {
+               set_in_cr4(X86_CR4_PSE);
+               __pe += _PAGE_PSE;
+               boot_cpu_data.wp_works_ok = 1;
+               if (cpu_has_pge) {
+                       set_in_cr4(X86_CR4_PGE);
+                       __pe += _PAGE_GLOBAL;
+               }
+       }
+
+       vaddr = PAGE_OFFSET;
+       i = __pgd_offset(vaddr);
        pgd = pgd_base + i;
 
        for (; i < PTRS_PER_PGD; pgd++, i++) {
-               vaddr = i*PGDIR_SIZE;
                if (end && (vaddr >= end))
                        break;
 #if CONFIG_X86_PAE
@@ -350,35 +362,24 @@
                if (pmd != pmd_offset(pgd, 0))
                        BUG();
                for (j = 0; j < PTRS_PER_PMD; pmd++, j++) {
-                       vaddr = i*PGDIR_SIZE + j*PMD_SIZE;
                        if (end && (vaddr >= end))
                                break;
                        if (cpu_has_pse) {
-                               unsigned long __pe;
-
-                               set_in_cr4(X86_CR4_PSE);
-                               boot_cpu_data.wp_works_ok = 1;
-                               __pe = _KERNPG_TABLE + _PAGE_PSE + __pa(vaddr);
-                               /* Make it "global" too if supported */
-                               if (cpu_has_pge) {
-                                       set_in_cr4(X86_CR4_PGE);
-                                       __pe += _PAGE_GLOBAL;
+                               set_pmd(pmd, __pmd(__pe + __pa(vaddr)));
+                               vaddr += PMD_SIZE;
+                       } else {
+                               pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
+                               set_pmd(pmd, __pmd(__pe + __pa(pte)));
+
+                               if (pte != pte_offset(pmd, 0))
+                                       BUG();
+
+                               for (k = 0; k < PTRS_PER_PTE; pte++, k++) {
+                                       if (end && (vaddr >= end))
+                                               break;
+                                       *pte = mk_pte_phys(__pa(vaddr), PAGE_KERNEL);
+                                       vaddr += PAGE_SIZE;
                                }
-                               set_pmd(pmd, __pmd(__pe));
-                               continue;
-                       }
-
-                       pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
-                       set_pmd(pmd, __pmd(_KERNPG_TABLE + __pa(pte)));
-
-                       if (pte != pte_offset(pmd, 0))
-                               BUG();
-
-                       for (k = 0; k < PTRS_PER_PTE; pte++, k++) {
-                               vaddr = i*PGDIR_SIZE + j*PMD_SIZE + k*PAGE_SIZE;
-                               if (end && (vaddr >= end))
-                                       break;
-                               *pte = mk_pte_phys(__pa(vaddr), PAGE_KERNEL);
                        }
                }
        }

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