Read back the register after setting or clearing a reset bit to make sure that the changes are applied to the reset controller hardware. Theoretically, this avoids the write to stay stuck in a store buffer during the delay of an assert-delay-deassert sequence, and makes sure that the reset really is asserted for the specified duration.
Signed-off-by: Philipp Zabel <p.za...@pengutronix.de> --- drivers/reset/reset-simple.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c index 2160e84fe216b..e32289bdaf0c6 100644 --- a/drivers/reset/reset-simple.c +++ b/drivers/reset/reset-simple.c @@ -33,13 +33,16 @@ static int reset_simple_clear(struct reset_controller_dev *rcdev, int reg_width = sizeof(u32); int bank = id / (reg_width * BITS_PER_BYTE); int offset = id % (reg_width * BITS_PER_BYTE); + void __iomem *addr = data->membase + (bank * reg_width); unsigned long flags; u32 reg; spin_lock_irqsave(&data->lock, flags); - reg = readl(data->membase + (bank * reg_width)); - writel(reg & ~BIT(offset), data->membase + (bank * reg_width)); + reg = readl(addr); + writel(reg & ~BIT(offset), addr); + /* Read back to make sure the write doesn't linger in a store buffer */ + readl(addr); spin_unlock_irqrestore(&data->lock, flags); @@ -53,13 +56,16 @@ static int reset_simple_set(struct reset_controller_dev *rcdev, int reg_width = sizeof(u32); int bank = id / (reg_width * BITS_PER_BYTE); int offset = id % (reg_width * BITS_PER_BYTE); + void __iomem *addr = data->membase + (bank * reg_width); unsigned long flags; u32 reg; spin_lock_irqsave(&data->lock, flags); - reg = readl(data->membase + (bank * reg_width)); - writel(reg | BIT(offset), data->membase + (bank * reg_width)); + reg = readl(addr); + writel(reg | BIT(offset), addr); + /* Read back to make sure the write doesn't linger in a store buffer */ + readl(addr); spin_unlock_irqrestore(&data->lock, flags); -- 2.11.0