From: Mauro Carvalho Chehab <mche...@osg.samsung.com>

commit 505a0ea706fc1db4381baa6c6bd2e596e730a55e upstream.

With the current settings, only one channel locks properly.
That's likely because, when this driver was written, Brazil
were still using experimental transmissions.

Change it to reproduce the settings used by the newer drivers.
That makes it lock on other channels.

Tested with both PixelView SBTVD Hybrid (cx231xx-based) and
C3Tech Digital Duo HDTV/SDTV (em28xx-based) devices.

Signed-off-by: Mauro Carvalho Chehab <mche...@s-opensource.com>
Signed-off-by: Willy Tarreau <w...@1wt.eu>
---
 drivers/media/dvb-frontends/mb86a20s.c | 92 ++++++++++++++++------------------
 1 file changed, 42 insertions(+), 50 deletions(-)

diff --git a/drivers/media/dvb-frontends/mb86a20s.c 
b/drivers/media/dvb-frontends/mb86a20s.c
index 3fbac5f..4a1346f 100644
--- a/drivers/media/dvb-frontends/mb86a20s.c
+++ b/drivers/media/dvb-frontends/mb86a20s.c
@@ -75,25 +75,27 @@ static struct regdata mb86a20s_init1[] = {
 };
 
 static struct regdata mb86a20s_init2[] = {
-       { 0x28, 0x22 }, { 0x29, 0x00 }, { 0x2a, 0x1f }, { 0x2b, 0xf0 },
+       { 0x50, 0xd1 }, { 0x51, 0x22 },
+       { 0x39, 0x01 },
+       { 0x71, 0x00 },
        { 0x3b, 0x21 },
-       { 0x3c, 0x38 },
+       { 0x3c, 0x3a },
        { 0x01, 0x0d },
-       { 0x04, 0x08 }, { 0x05, 0x03 },
+       { 0x04, 0x08 }, { 0x05, 0x05 },
        { 0x04, 0x0e }, { 0x05, 0x00 },
-       { 0x04, 0x0f }, { 0x05, 0x37 },
-       { 0x04, 0x0b }, { 0x05, 0x78 },
+       { 0x04, 0x0f }, { 0x05, 0x14 },
+       { 0x04, 0x0b }, { 0x05, 0x8c },
        { 0x04, 0x00 }, { 0x05, 0x00 },
-       { 0x04, 0x01 }, { 0x05, 0x1e },
-       { 0x04, 0x02 }, { 0x05, 0x07 },
-       { 0x04, 0x03 }, { 0x05, 0xd0 },
+       { 0x04, 0x01 }, { 0x05, 0x07 },
+       { 0x04, 0x02 }, { 0x05, 0x0f },
+       { 0x04, 0x03 }, { 0x05, 0xa0 },
        { 0x04, 0x09 }, { 0x05, 0x00 },
        { 0x04, 0x0a }, { 0x05, 0xff },
-       { 0x04, 0x27 }, { 0x05, 0x00 },
+       { 0x04, 0x27 }, { 0x05, 0x64 },
        { 0x04, 0x28 }, { 0x05, 0x00 },
-       { 0x04, 0x1e }, { 0x05, 0x00 },
-       { 0x04, 0x29 }, { 0x05, 0x64 },
-       { 0x04, 0x32 }, { 0x05, 0x02 },
+       { 0x04, 0x1e }, { 0x05, 0xff },
+       { 0x04, 0x29 }, { 0x05, 0x0a },
+       { 0x04, 0x32 }, { 0x05, 0x0a },
        { 0x04, 0x14 }, { 0x05, 0x02 },
        { 0x04, 0x04 }, { 0x05, 0x00 },
        { 0x04, 0x05 }, { 0x05, 0x22 },
@@ -101,8 +103,6 @@ static struct regdata mb86a20s_init2[] = {
        { 0x04, 0x07 }, { 0x05, 0xd8 },
        { 0x04, 0x12 }, { 0x05, 0x00 },
        { 0x04, 0x13 }, { 0x05, 0xff },
-       { 0x04, 0x15 }, { 0x05, 0x4e },
-       { 0x04, 0x16 }, { 0x05, 0x20 },
 
        /*
         * On this demod, when the bit count reaches the count below,
@@ -156,42 +156,36 @@ static struct regdata mb86a20s_init2[] = {
        { 0x50, 0x51 }, { 0x51, 0x04 },         /* MER symbol 4 */
        { 0x45, 0x04 },                         /* CN symbol 4 */
        { 0x48, 0x04 },                         /* CN manual mode */
-
+       { 0x50, 0xd5 }, { 0x51, 0x01 },
        { 0x50, 0xd6 }, { 0x51, 0x1f },
        { 0x50, 0xd2 }, { 0x51, 0x03 },
-       { 0x50, 0xd7 }, { 0x51, 0xbf },
-       { 0x28, 0x74 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0xff },
-       { 0x28, 0x46 }, { 0x29, 0x00 }, { 0x2a, 0x1a }, { 0x2b, 0x0c },
-
-       { 0x04, 0x40 }, { 0x05, 0x00 },
-       { 0x28, 0x00 }, { 0x2b, 0x08 },
-       { 0x28, 0x05 }, { 0x2b, 0x00 },
+       { 0x50, 0xd7 }, { 0x51, 0x3f },
        { 0x1c, 0x01 },
-       { 0x28, 0x06 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x1f },
-       { 0x28, 0x07 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x18 },
-       { 0x28, 0x08 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x12 },
-       { 0x28, 0x09 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x30 },
-       { 0x28, 0x0a }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x37 },
-       { 0x28, 0x0b }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x02 },
-       { 0x28, 0x0c }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x09 },
-       { 0x28, 0x0d }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x06 },
-       { 0x28, 0x0e }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x7b },
-       { 0x28, 0x0f }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x76 },
-       { 0x28, 0x10 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x7d },
-       { 0x28, 0x11 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x08 },
-       { 0x28, 0x12 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0b },
-       { 0x28, 0x13 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x00 },
-       { 0x28, 0x14 }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0xf2 },
-       { 0x28, 0x15 }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0xf3 },
-       { 0x28, 0x16 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x05 },
-       { 0x28, 0x17 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x16 },
-       { 0x28, 0x18 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0f },
-       { 0x28, 0x19 }, { 0x29, 0x00 }, { 0x2a, 0x07 }, { 0x2b, 0xef },
-       { 0x28, 0x1a }, { 0x29, 0x00 }, { 0x2a, 0x07 }, { 0x2b, 0xd8 },
-       { 0x28, 0x1b }, { 0x29, 0x00 }, { 0x2a, 0x07 }, { 0x2b, 0xf1 },
-       { 0x28, 0x1c }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x3d },
-       { 0x28, 0x1d }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x94 },
-       { 0x28, 0x1e }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0xba },
+       { 0x28, 0x06 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x03 },
+       { 0x28, 0x07 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0d },
+       { 0x28, 0x08 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x02 },
+       { 0x28, 0x09 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x01 },
+       { 0x28, 0x0a }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x21 },
+       { 0x28, 0x0b }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x29 },
+       { 0x28, 0x0c }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x16 },
+       { 0x28, 0x0d }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x31 },
+       { 0x28, 0x0e }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0e },
+       { 0x28, 0x0f }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x4e },
+       { 0x28, 0x10 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x46 },
+       { 0x28, 0x11 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0f },
+       { 0x28, 0x12 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x56 },
+       { 0x28, 0x13 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x35 },
+       { 0x28, 0x14 }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0xbe },
+       { 0x28, 0x15 }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0x84 },
+       { 0x28, 0x16 }, { 0x29, 0x00 }, { 0x2a, 0x03 }, { 0x2b, 0xee },
+       { 0x28, 0x17 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x98 },
+       { 0x28, 0x18 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x9f },
+       { 0x28, 0x19 }, { 0x29, 0x00 }, { 0x2a, 0x07 }, { 0x2b, 0xb2 },
+       { 0x28, 0x1a }, { 0x29, 0x00 }, { 0x2a, 0x06 }, { 0x2b, 0xc2 },
+       { 0x28, 0x1b }, { 0x29, 0x00 }, { 0x2a, 0x07 }, { 0x2b, 0x4a },
+       { 0x28, 0x1c }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0xbc },
+       { 0x28, 0x1d }, { 0x29, 0x00 }, { 0x2a, 0x04 }, { 0x2b, 0xba },
+       { 0x28, 0x1e }, { 0x29, 0x00 }, { 0x2a, 0x06 }, { 0x2b, 0x14 },
        { 0x50, 0x1e }, { 0x51, 0x5d },
        { 0x50, 0x22 }, { 0x51, 0x00 },
        { 0x50, 0x23 }, { 0x51, 0xc8 },
@@ -200,9 +194,7 @@ static struct regdata mb86a20s_init2[] = {
        { 0x50, 0x26 }, { 0x51, 0x00 },
        { 0x50, 0x27 }, { 0x51, 0xc3 },
        { 0x50, 0x39 }, { 0x51, 0x02 },
-       { 0xec, 0x0f },
-       { 0xeb, 0x1f },
-       { 0x28, 0x6a }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x00 },
+       { 0x50, 0xd5 }, { 0x51, 0x01 },
        { 0xd0, 0x00 },
 };
 
-- 
2.8.0.rc2.1.gbe9624a

Reply via email to