Commit-ID:  bc7c36eedb0c7004aa06c2afc3c5385adada8fa3
Gitweb:     http://git.kernel.org/tip/bc7c36eedb0c7004aa06c2afc3c5385adada8fa3
Author:     Joonyoung Shim <jy0922.s...@samsung.com>
AuthorDate: Tue, 17 Jan 2017 13:54:36 +0900
Committer:  Thomas Gleixner <t...@linutronix.de>
CommitDate: Tue, 17 Jan 2017 10:08:38 +0100

clocksource/exynos_mct: Clear interrupt when cpu is shut down

When a CPU goes offline a potentially pending timer interrupt is not
cleared. When the CPU comes online again then the pending interrupt is
delivered before the per cpu clockevent device is initialized. As a
consequence the tick interrupt handler dereferences a NULL pointer.

[   51.251378] Unable to handle kernel NULL pointer dereference at virtual 
address 00000040
[   51.289348] task: ee942d00 task.stack: ee960000
[   51.293861] PC is at tick_periodic+0x38/0xb0
[   51.298102] LR is at tick_handle_periodic+0x1c/0x90

Clear the pending interrupt in the cpu dying path.

Fixes: 56a94f13919c ("clocksource: exynos_mct: Avoid blocking calls in the cpu 
hotplug notifier")
Reported-by: Seung-Woo Kim <sw0312....@samsung.com>
Signed-off-by: Joonyoung Shim <jy0922.s...@samsung.com>
Cc: linux-samsung-...@vger.kernel.org
Cc: cw00.c...@samsung.com
Cc: daniel.lezc...@linaro.org
Cc: sta...@vger.kernel.org
Cc: jav...@osg.samsung.com
Cc: kg...@kernel.org
Cc: k...@kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Link: 
http://lkml.kernel.org/r/1484628876-22065-1-git-send-email-jy0922.s...@samsung.com
Signed-off-by: Thomas Gleixner <t...@linutronix.de>

---
 drivers/clocksource/exynos_mct.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index 4da1dc2..670ff0f 100644
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -495,6 +495,7 @@ static int exynos4_mct_dying_cpu(unsigned int cpu)
        if (mct_int_type == MCT_INT_SPI) {
                if (evt->irq != -1)
                        disable_irq_nosync(evt->irq);
+               exynos4_mct_write(0x1, mevt->base + MCT_L_INT_CSTAT_OFFSET);
        } else {
                disable_percpu_irq(mct_irqs[MCT_L0_IRQ]);
        }

Reply via email to