With this patch the polarity settings for i.MX's PWMv2 is now supported
on top of atomic PWM setting

Signed-off-by: Bhuvanchandra DV <bhuvanchandra...@toradex.com>
Signed-off-by: Lukasz Majewski <l.majew...@majess.pl>
---
Changes for v4:
- MX3_PWMCR_POUTC setting adjustements after apply_v2() previous changes

Changes for v3:
- None

Changes for v2:
- New patch
---
 drivers/pwm/pwm-imx.c | 22 +++++++++++++++++-----
 1 file changed, 17 insertions(+), 5 deletions(-)

diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c
index afca5f5..d35d83f 100644
--- a/drivers/pwm/pwm-imx.c
+++ b/drivers/pwm/pwm-imx.c
@@ -38,6 +38,7 @@
 #define MX3_PWMCR_DOZEEN               (1 << 24)
 #define MX3_PWMCR_WAITEN               (1 << 23)
 #define MX3_PWMCR_DBGEN                        (1 << 22)
+#define MX3_PWMCR_POUTC                        (1 << 18)
 #define MX3_PWMCR_CLKSRC_IPG_HIGH      (2 << 16)
 #define MX3_PWMCR_CLKSRC_IPG           (1 << 16)
 #define MX3_PWMCR_SWR                  (1 << 3)
@@ -164,6 +165,7 @@ static int imx_pwm_apply_v2(struct pwm_chip *chip, struct 
pwm_device *pwm,
        struct pwm_state cstate;
        unsigned long long c;
        int ret;
+       u32 cr;
 
        pwm_get_state(pwm, &cstate);
 
@@ -207,12 +209,15 @@ static int imx_pwm_apply_v2(struct pwm_chip *chip, struct 
pwm_device *pwm,
                writel(duty_cycles, imx->mmio_base + MX3_PWMSAR);
                writel(period_cycles, imx->mmio_base + MX3_PWMPR);
 
-               writel(MX3_PWMCR_PRESCALER(prescale) |
-                      MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN |
-                      MX3_PWMCR_DBGEN | MX3_PWMCR_CLKSRC_IPG_HIGH |
-                      MX3_PWMCR_EN,
-                      imx->mmio_base + MX3_PWMCR);
+               cr = MX3_PWMCR_PRESCALER(prescale) |
+                       MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN |
+                       MX3_PWMCR_DBGEN | MX3_PWMCR_CLKSRC_IPG_HIGH |
+                       MX3_PWMCR_EN;
+
+               if (state->polarity == PWM_POLARITY_INVERSED)
+                       cr |= MX3_PWMCR_POUTC;
 
+               writel(cr, imx->mmio_base + MX3_PWMCR);
        } else {
                writel(0, imx->mmio_base + MX3_PWMCR);
 
@@ -235,6 +240,7 @@ static struct pwm_ops imx_pwm_ops_v2 = {
 };
 
 struct imx_pwm_data {
+       bool polarity_supported;
        struct pwm_ops *pwm_ops;
 };
 
@@ -243,6 +249,7 @@ static struct imx_pwm_data imx_pwm_data_v1 = {
 };
 
 static struct imx_pwm_data imx_pwm_data_v2 = {
+       .polarity_supported = true,
        .pwm_ops = &imx_pwm_ops_v2,
 };
 
@@ -283,6 +290,11 @@ static int imx_pwm_probe(struct platform_device *pdev)
        imx->chip.base = -1;
        imx->chip.npwm = 1;
        imx->chip.can_sleep = true;
+       if (data->polarity_supported) {
+               dev_dbg(&pdev->dev, "PWM supports output inversion\n");
+               imx->chip.of_xlate = of_pwm_xlate_with_flags;
+               imx->chip.of_pwm_n_cells = 3;
+       }
 
        r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
        imx->mmio_base = devm_ioremap_resource(&pdev->dev, r);
-- 
2.1.4

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