> > Just curious - what is the stage TWO (and onwards) plan?
> > lwn had some coverage of this work but I assume the
> > article is somewhat outdated.
>
> Stage 2 is to consolidate all the archictecture code, i.e. reduce it to
> really arch specific callbacks and keep all the other things
> (synchronization, state settings etc.) in the core code.
>
> After that we can do smart things like speed up the boot hotplug process:
>
> prepare CPU1
> kick CPU1
>
> prepare CPU2
> kick CPU2
>
> ....
>
> prepare CPUN
> kick CPUN
>
> check CPU1 alive
> bringup CPU1
>
> ...
>
> check CPUN alive
> bringup CPUN
>
> That saves ~200ms per CPU on x86, which we now spend busy waiting for the
> CPU to come alive.
>
> There is more stuff which we can do in the long run like synchrounosly
> letting CPUs bring up themself after the basic init/sync checks, but that
> needs lot of surgery all over the place.
Thanks for the update - looking forward to follow this great clean-up!
Sam
