Hi Boris,
> On Thu, 27 Oct 2016 08:29:39 +0200
> Lukasz Majewski <l.majew...@majess.pl> wrote:
>
> > The code has been rewritten to remove "generic" calls to
> > imx_pwm_{enable|disable|config}.
> >
> > Such approach would facilitate switch to atomic PWM (a.k.a
> > ->apply()) implementation.
> >
> > Suggested-by: Stefan Agner <ste...@agner.ch>
> > Suggested-by: Boris Brezillon <boris.brezil...@free-electrons.com>
> > Signed-off-by: Lukasz Majewski <l.majew...@majess.pl>
> > ---
> > Changes for v2:
> > - Add missing clock unprepare for clk_ipg
> > - Enable peripheral PWM clock (clk_per)
> > ---
> > drivers/pwm/pwm-imx.c | 50
> > ++++++++++++++++++++++++++++++++++++++------------ 1 file changed,
> > 38 insertions(+), 12 deletions(-)
> >
> > diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c
> > index ea3ce79..822eb5a 100644
> > --- a/drivers/pwm/pwm-imx.c
> > +++ b/drivers/pwm/pwm-imx.c
> > @@ -65,8 +65,6 @@ struct imx_chip {
> > static int imx_pwm_config_v1(struct pwm_chip *chip,
> > struct pwm_device *pwm, int duty_ns, int period_ns)
> > {
> > - struct imx_chip *imx = to_imx_chip(chip);
> > -
> > /*
> > * The PWM subsystem allows for exact frequencies. However,
> > * I cannot connect a scope on my device to the PWM line
> > and @@ -84,26 +82,56 @@ static int imx_pwm_config_v1(struct
> > pwm_chip *chip,
> > * both the prescaler (/1 .. /128) and then by CLKSEL
> > * (/2 .. /16).
> > */
> > + struct imx_chip *imx = to_imx_chip(chip);
> > u32 max = readl(imx->mmio_base + MX1_PWMP);
> > u32 p = max * duty_ns / period_ns;
> > + int ret;
> > +
> > + ret = clk_prepare_enable(imx->clk_ipg);
> > + if (ret)
> > + return ret;
> > +
> > writel(max - p, imx->mmio_base + MX1_PWMS);
> >
> > + clk_disable_unprepare(imx->clk_ipg);
> > +
> > return 0;
> > }
> >
> > -static void imx_pwm_set_enable_v1(struct pwm_chip *chip, bool
> > enable) +static int imx_pwm_enable_v1(struct pwm_chip *chip, struct
> > pwm_device *pwm) {
> > struct imx_chip *imx = to_imx_chip(chip);
> > + int ret;
> > u32 val;
> >
> > + ret = clk_prepare_enable(imx->clk_ipg);
> > + if (ret)
> > + return ret;
> > +
> > + ret = clk_prepare_enable(imx->clk_per);
> > + if (ret)
> > + return ret;
> > +
> > val = readl(imx->mmio_base + MX1_PWMC);
> > + val |= MX1_PWMC_EN;
> > + writel(val, imx->mmio_base + MX1_PWMC);
> >
> > - if (enable)
> > - val |= MX1_PWMC_EN;
> > - else
> > - val &= ~MX1_PWMC_EN;
> > + clk_disable_unprepare(imx->clk_ipg);
> > +
> > + return 0;
> > +}
> > +
> > +static void imx_pwm_disable_v1(struct pwm_chip *chip, struct
> > pwm_device *pwm) +{
> > + struct imx_chip *imx = to_imx_chip(chip);
> > + u32 val;
> > +
> > + val = readl(imx->mmio_base + MX1_PWMC);
> > + val &= ~MX1_PWMC_EN;
> >
> > writel(val, imx->mmio_base + MX1_PWMC);
>
> Are you sure you don't need to enable the ipg clk when manipulating
> the PWMC register?
> If it's not needed here, then it's probably not needed in
> imx_pwm_enable_v1() either.
Yes, probably it is needed.
As I've mentioned in the cover letter - I do not have PWMv1 HW so I can
only compile test the code.
(And here support from the community is very welcome).
Best regards,
Łukasz Majewski
>
> > +
> > + clk_disable_unprepare(imx->clk_per);
> > }
> >
> > static int imx_pwm_config_v2(struct pwm_chip *chip,
> > @@ -241,9 +269,9 @@ static void imx_pwm_disable(struct pwm_chip
> > *chip, struct pwm_device *pwm) }
> >
> > static struct pwm_ops imx_pwm_ops_v1 = {
> > - .enable = imx_pwm_enable,
> > - .disable = imx_pwm_disable,
> > - .config = imx_pwm_config,
> > + .enable = imx_pwm_enable_v1,
> > + .disable = imx_pwm_disable_v1,
> > + .config = imx_pwm_config_v1,
> > .owner = THIS_MODULE,
> > };
> >
> > @@ -262,8 +290,6 @@ struct imx_pwm_data {
> > };
> >
> > static struct imx_pwm_data imx_pwm_data_v1 = {
> > - .config = imx_pwm_config_v1,
> > - .set_enable = imx_pwm_set_enable_v1,
> > .pwm_ops = &imx_pwm_ops_v1,
> > };
> >
>
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