On 10/10/16 21:39, Aaron Brice wrote: > - The DMA error interrupt bit is in a different position as > compared to the sdhci standard. This is accounted for in > many cases, but not handled in the case of clearing the > INT_STATUS register by writing a 1 to that location. > - The HOST_CONTROL register is very different as compared to > the sdhci standard. This is accounted for in the write > case, but not when read back out (which it is in the sdhci > code). > > Signed-off-by: Dave Russell <david.russ...@datasoft.com> > Signed-off-by: Aaron Brice <aaron.br...@datasoft.com> > Acked-by: Dong Aisheng <aisheng.d...@nxp.com>
Acked-by: Adrian Hunter <adrian.hun...@intel.com>
