>>> Andi Kleen <[EMAIL PROTECTED]> 10.02.07 12:50 >>> > >From: "Bryan O'Sullivan" <[EMAIL PROTECTED]> > >This copy routine is memcpy-compatible, but on some architectures will use >cache-bypassing loads to avoid bringing the source data into the cache. > >One case where this is useful is when a device issues a DMA to a memory >region, and the CPU must copy the DMAed data elsewhere before doing any work >with it. Since the source data is read-once, write-never from the CPU's >perspective, caching the data at those addresses can only evict potentially >useful data. > >We provide an x86_64 implementation that uses SSE non-temporal loads, and a >generic version that falls back to plain memcpy. > >Implementors for other arches should not use cache-bypassing stores to the >destination, as in most cases, the destination is accessed almost immediately >after a copy finishes.
This looks a little strange to me: - the first 128 bytes are still going through the cache - up to 192 bytes past the copied area are being marked non-temporal, while there's nothing known about that area - sfence seems questionable here, I would have thought this should be lfence, or perhaps even none at all Minor remarks would be to remove the double .align before .L12 and replace or-ing a register with itself by test. Jan - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
