On 14/07/16 21:35, Mathieu Poirier wrote: > Coresight ETMs are IP blocks used to perform HW assisted tracing > on a CPU core. This patch introduce the required auxiliary API > functions allowing the perf core to interact with a tracer. > > Signed-off-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Acked-by: Adrian Hunter <adrian.hun...@intel.com>
