Mikael Pettersson wrote:
3) Many Intel processors, including at least most P6s and probably
also some P4s, have an erratum which effectively halves the number
of available PAT entries, forcing an OS to make the low 4 and upper
4 PAT entries identical.
I don't know if 4 PAT types suffice for the kinds of uses people
have in mind. But support for PAT would either have to restrict
itself to only 4 PAT types, or ensure that it is only enabled on
new enough processors where it actually works.
You will need to read all available Intel errata sheets (spec updates)
to determine which processors are affected and which are OK.
There aren't really that many useful caching types, so it probably
doesn't matter all that much.
The types that matters most are WB, WC, and UC. The fourth one could be
WT, or it could be UC- (however, UC- can *always* be emulated by simply
having the kernel being aware of the MTRR settings.)
-hpa
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