On Fri, Apr 01, 2016 at 10:23:23AM +0200, Peter Zijlstra wrote: > > Trim your emails > > On Fri, Apr 01, 2016 at 10:16:42AM +0200, Stephane Gasparini wrote: > > > > That means these delta's can be arbitrarily large, in fact the MSRs can > > > have wrapped however many times. > > > > 64 bits is 18 446 744 073 709 551 615 > > > > so even assuming a 10 GHz frequency if my math are good this is more than > > 58 years before the MSR wrap around, assuming the device ran always at max > > freq. > > fair enough.. but going with 10Ghz, cpu_khz would be 10e6 ~ 33 bits,
I can't do maths this morning; 23 bits > which effectively reduces the wrap/overflow time to just 31 bits, which > per that frequency is just ~1/4th of a second. 41 giving lots more, but a reasonable time to wrap/overflow.
