The emmc-phy occupies a contiguous set of 8 registers inside the general register files, so the reg property should specify this.
Signed-off-by: Heiko Stuebner <he...@sntech.de> --- This is essential a counter argument for Shawn's move from reg to reg_offset in "phy: rockchip-emmc: fix compile issue on arm64 platform" [0]. With the move under the grf we now also are able to specify this stuff cleanly using already present mechanisms. Also meant to v4.6-rc before the binding solidifies. [0] https://lkml.org/lkml/2016/3/8/114 Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt index 461e958..555cb0f 100644 --- a/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt +++ b/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt @@ -4,7 +4,7 @@ Rockchip EMMC PHY Required properties: - compatible: rockchip,rk3399-emmc-phy - #phy-cells: must be 0 - - reg: PHY configure reg address offset in "general + - reg: PHY register address offset and length in "general register files" Example: @@ -12,12 +12,14 @@ Example: grf: syscon@ff770000 { compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; ... emmcphy: phy@f780 { compatible = "rockchip,rk3399-emmc-phy"; - reg = <0xf780>; + reg = <0xf780 0x20>; #phy-cells = <0>; }; }; -- 2.7.0
