On Thu, Feb 04, 2016 at 04:42:53PM -0800, David Daney wrote: > From: David Daney <david.da...@cavium.com> > > Add irq_chip support for both IPI and "normal" interrupts of the CIU3 > controller. Document the device tree binding for the CIU3. > > Signed-off-by: David Daney <david.da...@cavium.com> > Cc: Rob Herring <robh...@kernel.org> > Cc: Pawel Moll <pawel.m...@arm.com> > Cc: Mark Rutland <mark.rutl...@arm.com> > Cc: Ian Campbell <ijc+devicet...@hellion.org.uk> > Cc: Kumar Gala <ga...@codeaurora.org> > Cc: devicet...@vger.kernel.org > Cc: Thomas Gleixner <t...@linutronix.de> > --- > .../devicetree/bindings/mips/cavium/ciu3.txt | 27 +
Acked-by: Rob Herring <r...@kernel.org> > arch/mips/cavium-octeon/octeon-irq.c | 651 > ++++++++++++++++++++- > arch/mips/include/asm/octeon/octeon.h | 2 + > 3 files changed, 679 insertions(+), 1 deletion(-) > create mode 100644 Documentation/devicetree/bindings/mips/cavium/ciu3.txt
